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ESP32-S3R8V
Public Made by Adomby adom
Espressif Systems RF and Wireless, 56-VFQFN Exposed Pad. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with kicad-footprint-generator 10.0 · KiCad file format 20260206
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ESP32-S3R8V
Espressif Systems · RF and Wireless · 56-VFQFN Exposed Pad
ESP32-S3R8V from Espressif Systems, in a 56-VFQFN Exposed Pad. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LNA_IN | bidirectional | RF low-noise amplifier input/output signal for the 2.4 GHz receive and transmit path. |
| 2 | VDD3P3 | power_in | Analog power domain supply input; recommended and maximum voltage ratings are given in Sections 5.1 and 5.2. |
| 3 | VDD3P3 | power_in | Analog power domain supply input; recommended and maximum voltage ratings are given in Sections 5.1 and 5.2. |
| 4 | CHIP_PU | input | High enables the chip and low disables it (powered down); do not leave this pin floating. |
| 5 | GPIO0 | bidirectional | General-purpose IO and boot-mode strapping pin; weak pull-up at reset, default drive strength 20 mA. |
| 6 | GPIO1 | bidirectional | General-purpose IO with RTC_GPIO1, TOUCH1 and ADC1_CH0 functions; low-level glitch at power-up for about 60 µs. |
| 7 | GPIO2 | bidirectional | General-purpose IO with RTC_GPIO2, TOUCH2 and ADC1_CH1 functions; low-level glitch at power-up for about 60 µs. |
| 8 | GPIO3 | bidirectional | General-purpose IO with RTC_GPIO3, TOUCH3 and ADC1_CH2 functions; strapping pin for JTAG signal source selection. |
| 9 | GPIO4 | bidirectional | General-purpose IO with RTC_GPIO4, TOUCH4 and ADC1_CH3 functions; default drive strength 20 mA. |
| 10 | GPIO5 | bidirectional | General-purpose IO with RTC_GPIO5, TOUCH5 and ADC1_CH4 functions; default drive strength 20 mA. |
| 11 | GPIO6 | bidirectional | General-purpose IO with RTC_GPIO6, TOUCH6 and ADC1_CH5 functions; default drive strength 20 mA. |
| 12 | GPIO7 | bidirectional | General-purpose IO with RTC_GPIO7, TOUCH7 and ADC1_CH6 functions; default drive strength 20 mA. |
| 13 | GPIO8 | bidirectional | General-purpose IO with RTC_GPIO8, TOUCH8 and ADC1_CH7 functions; can route SUBSPICS1 signal. |
| 14 | GPIO9 | bidirectional | General-purpose IO with RTC_GPIO9, TOUCH9 and ADC1_CH8 functions; can route SUBSPIHD or FSPIHD signals. |
| 15 | GPIO10 | bidirectional | General-purpose IO with RTC_GPIO10, TOUCH10 and ADC1_CH9 functions; can route FSPICS0 or SUBSPICS0 signals. |
| 16 | GPIO11 | bidirectional | General-purpose IO with RTC_GPIO11, TOUCH11 and ADC2_CH0 functions; can route FSPID or SUBSPID signals. |
| 17 | GPIO12 | bidirectional | General-purpose IO with RTC_GPIO12, TOUCH12 and ADC2_CH1 functions; can route FSPICLK or SUBSPICLK signals. |
| 18 | GPIO13 | bidirectional | General-purpose IO with RTC_GPIO13, TOUCH13 and ADC2_CH2 functions; can route FSPIQ or SUBSPIQ signals. |
| 19 | GPIO14 | bidirectional | General-purpose IO with RTC_GPIO14, TOUCH14 and ADC2_CH3 functions; can route FSPIWP or SUBSPIWP signals. |
| 20 | VDD3P3_RTC | power_in | Power input for the RTC domain and part of the digital domain, which powers the RTC IO pins. |
| 21 | XTAL_32K_P | bidirectional | Positive 32 kHz external clock input/output connected to the oscillator; also RTC_GPIO15 and ADC2_CH4. |
| 22 | XTAL_32K_N | bidirectional | Negative 32 kHz external clock input/output connected to the oscillator; also RTC_GPIO16 and ADC2_CH5. |
| 23 | GPIO17 | bidirectional | General-purpose IO with RTC_GPIO17, ADC2_CH6 and U1TXD functions; default drive strength 10 mA. |
| 24 | GPIO18 | bidirectional | General-purpose IO with RTC_GPIO18, ADC2_CH7 and U1RXD functions; default drive strength 10 mA. |
| 25 | GPIO19 | bidirectional | General-purpose IO and USB_D- of the USB Serial/JTAG and USB OTG controller; default drive strength 40 mA. |
| 26 | GPIO20 | bidirectional | General-purpose IO and USB_D+ of the USB Serial/JTAG and USB OTG controller; default drive strength 40 mA. |
| 27 | GPIO21 | bidirectional | General-purpose IO with RTC_GPIO21 function. |
| 28 | SPICS1 | bidirectional | SPI chip select 1 for the in-package PSRAM on this variant; reserved for in-package memory and not for other uses. |
| 29 | VDD_SPI | power_out | Internal regulator output for in-package flash/PSRAM and SPI IO, set to 1.8 V on ESP32-S3R8V; can also be configured as input. |
| 30 | SPIHD | bidirectional | SPI hold signal for in-package PSRAM (SIO3 or DQ3 in octal mode); reserved for in-package memory and not for other uses. |
| 31 | SPIWP | bidirectional | SPI write-protect signal for in-package PSRAM (SIO2 or DQ2 in octal mode); reserved for in-package memory and not for other uses. |
| 32 | SPICS0 | bidirectional | SPI chip select 0 for the in-package flash; reserved for in-package memory and not for other uses. |
| 33 | SPICLK | bidirectional | SPI clock for in-package flash and PSRAM; reserved for in-package memory and not for other uses. |
| 34 | SPIQ | bidirectional | SPI data line 1 for in-package flash and PSRAM (DO or DQ1 in octal mode); reserved for in-package memory. |
| 35 | SPID | bidirectional | SPI data line 0 for in-package flash and PSRAM (DI or DQ0 in octal mode); reserved for in-package memory. |
| 36 | SPICLK_N | bidirectional | Negative differential SPI clock (GPIO48); on the R8V variant its working voltage is 1.8 V because VDD_SPI is 1.8 V. |
| 37 | SPICLK_P | bidirectional | Positive differential SPI clock (GPIO47); on the R8V variant its working voltage is 1.8 V because VDD_SPI is 1.8 V. |
| 38 | GPIO33 | bidirectional | General-purpose IO; in octal PSRAM mode it is the DQ4 data line to in-package memory, so usable only if not used for PSRAM. |
| 39 | GPIO34 | bidirectional | General-purpose IO; in octal PSRAM mode it is the DQ5 data line to in-package memory, so usable only if not used for PSRAM. |
| 40 | GPIO35 | bidirectional | General-purpose IO; in octal PSRAM mode it is the DQ6 data line to in-package memory, so usable only if not used for PSRAM. |
| 41 | GPIO36 | bidirectional | General-purpose IO; in octal PSRAM mode it is the DQ7 data line to in-package memory, so usable only if not used for PSRAM. |
| 42 | GPIO37 | bidirectional | General-purpose IO; in octal PSRAM mode it is the DQS/DM strobe line to in-package memory, so usable only if not used for PSRAM. |
| 43 | GPIO38 | bidirectional | General-purpose IO powered by VDD3P3_CPU with FSPIWP and SUBSPIWP alternate functions. |
| 44 | MTCK | bidirectional | JTAG test clock input (GPIO39); pin floats when EFUSE_DIS_PAD_JTAG is set. |
| 45 | MTDO | bidirectional | JTAG test data output (GPIO40); powered by VDD3P3_CPU. |
| 46 | VDD3P3_CPU | power_in | Digital power domain supply input for digital IO pins. |
| 47 | MTDI | bidirectional | JTAG test data input (GPIO41); powered by VDD3P3_CPU. |
| 48 | MTMS | bidirectional | JTAG test mode select input (GPIO42); powered by VDD3P3_CPU. |
| 49 | U0TXD | bidirectional | UART0 transmit data (GPIO43); weak pull-up at reset and default boot-log output. |
| 50 | U0RXD | bidirectional | UART0 receive data (GPIO44); weak pull-up at reset. |
| 51 | GPIO45 | bidirectional | General-purpose IO and VDD_SPI voltage strapping pin; weak pull-down at reset. |
| 52 | GPIO46 | bidirectional | General-purpose IO and ROM message printing / boot strapping pin; weak pull-down at reset. |
| 53 | XTAL_N | passive | Negative external clock input/output connected to the chip crystal or oscillator. |
| 54 | XTAL_P | passive | Positive external clock input/output connected to the chip crystal or oscillator. |
| 55 | VDDA | power_in | Analog power domain supply input; recommended and maximum voltage ratings are given in Sections 5.1 and 5.2. |
| 56 | VDDA | power_in | Analog power domain supply input; recommended and maximum voltage ratings are given in Sections 5.1 and 5.2. |
| 57 | GND | power_in | Ground connection; the exposed pad of the QFN56 package is the ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Espressif Systems |
| Package | 56-VFQFN Exposed Pad |
| Category | RF and Wireless |
| Pins | 57 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Allowed input voltage (input power pins) | -0.3 | 3.6 | V | 64 | |||
| Cumulative IO output current | Ioutput | 1500 | mA | 64 | |||
| Storage temperature | TSTORE | -40 | 150 | °C | 64 | ||
| Recommended input voltage (VDDA, VDD3P3) | VDDA, VDD3P3 | 3 | 3.3 | 3.6 | V | 64 | |
| Recommended input voltage (VDD3P3_RTC) | VDD3P3_RTC | 3 | 3.3 | 3.6 | V | 64 | |
| Recommended input voltage (VDD_SPI as input) | VDD_SPI | 1.8 | 3.3 | 3.6 | V | 64 | |
| Recommended input voltage (VDD3P3_CPU) | VDD3P3_CPU | 3 | 3.3 | 3.6 | V | 64 | |
| Cumulative input current | IVDD | 0.5 | A | 64 | |||
| High-level input current | IIH | 50 | nA | 65 | |||
| Low-level input current | IIL | 50 | nA | 65 | |||
| Differential nonlinearity (ADC) | DNL | -4 | 4 | LSB | 66 | ||
| Integral nonlinearity (ADC) | INL | -8 | 8 | LSB | 66 | ||
| Sampling rate (ADC) | 100 | kSPS | 66 | ||||
| Total error (ADC calibrated) | -5 | 5 | mV | ATTEN0, effective measurement range of 0 ~ 850 | 66 | ||
| Total error (ADC calibrated) | -6 | 6 | mV | ATTEN1, effective measurement range of 0 ~ 1100 | 66 | ||
| Total error (ADC calibrated) | -10 | 10 | mV | ATTEN2, effective measurement range of 0 ~ 1600 | 66 | ||
| Total error (ADC calibrated) | -50 | 50 | mV | ATTEN3, effective measurement range of 0 ~ 2900 | 66 | ||
| Power supply voltage (1.8 V PSRAM) | VCC | 1.62 | 1.8 | 1.98 | V | 69 | |
| Maximum clock frequency (PSRAM) | FC | 80 | MHz | 69 | |||
| Time reserved for power rails to stabilize before CHIP_PU is pulled high | tST BL | 50 | µs | VDDA, VDD3P3, VDD3P3_RTC, VDD3P3_CPU | 30 | ||
| Time reserved for CHIP_PU to stay below VIL_nRST to reset the chip | tRST | 50 | µs | 30 | |||
| RF power control range (Bluetooth LE) | -24 | 0 | 20 | dBm | Bluetooth LE 1 Mbps | 73 | |
| Center frequency range of operating channel (Wi-Fi) | 2412 | 2484 | MHz | 70 | |||
| Center frequency of operating channel (Bluetooth LE) | 2402 | 2480 | MHz | 72 | |||
| TX EVM limit (Wi-Fi) | -10 | dB | 802.11b, 1 Mbps, @21 dBm | 70 | |||
| TX EVM limit (Wi-Fi) | -5 | dB | 802.11g, 6 Mbps, @20.5 dBm | 70 | |||
| TX EVM limit (Wi-Fi) | -25 | dB | 802.11g, 54 Mbps, @19 dBm | 70 | |||
| TX EVM limit (Wi-Fi) | -5 | dB | 802.11n, HT20, MCS0, @19.5 dBm | 71 | |||
| TX EVM limit (Wi-Fi) | -27 | dB | 802.11n, HT20, MCS7, @18.5 dBm | 71 |
CAD (KiCad official)
- Symbol:
ESP32-S3R8V - Footprint:
Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP5.6x5.6mm - 3D model: 56-VFQFN Exposed Pad (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Espressif Systems datasheet (87 pp, sha256
2d5a7cb7fd559d8d, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).