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ESP32-H2FH2S
Public Made by Adomby adom
Espressif Systems RF and Wireless, 32-VFQFN Exposed Pad. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownESP32-H2FH2S
Espressif Systems · RF and Wireless · 32-VFQFN Exposed Pad
ESP32-H2FH2S from Espressif Systems, in a 32-VFQFN Exposed Pad. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD3P3 | power_in | Analog power domain supply pin for the chip. |
| 2 | VDD3P3 | power_in | Analog power domain supply pin for the chip. |
| 3 | GPIO0 | bidirectional | Digital IO powered from VDDPST1, with IO MUX functions GPIO0 and FSPIQ (SPI2 data out) and strapping-related boot behaviour. |
| 4 | GPIO1 | bidirectional | Digital IO powered from VDDPST1, usable as ADC1_CH0 analog input and FSPICS0 SPI2 chip select. |
| 5 | MTMS | bidirectional | JTAG test mode select, also usable as GPIO2 and ADC1_CH1; input enabled at reset, powered from VDDPST1. |
| 6 | MTDO | bidirectional | JTAG test data out, also usable as GPIO3 and ADC1_CH2; input enabled at reset, powered from VDDPST1. |
| 7 | MTCK | bidirectional | JTAG test clock, also usable as GPIO4 and ADC1_CH3; input enabled depending on EFUSE_DIS_PAD_JTAG, powered from VDDPST1. |
| 8 | MTDI | bidirectional | JTAG test data in, also usable as GPIO5 and ADC1_CH4; input enabled at reset, powered from VDDPST1. |
| 9 | VDDPST1 | power_in | IO power domain supply for digital IO and LP IO pins in the first bank. |
| 10 | GPIO8 | bidirectional | LP IO pin powered from VDDPST1, input enabled at reset and after reset. |
| 11 | GPIO9 | bidirectional | LP IO pin powered from VDDPST1, with input enabled and internal weak pull-up enabled at reset and after reset. |
| 12 | GPIO10 | bidirectional | IO pin powered from VDDPST1, also usable as analog pad voltage comparator input ZCD0 and analog function. |
| 13 | GPIO11 | bidirectional | IO pin powered from VDDPST1, also usable as analog pad voltage comparator input ZCD1 and analog function. |
| 14 | GPIO12 | bidirectional | IO pin powered from VDDA_PMU/VBAT, providing standard GPIO IO MUX functions. |
| 15 | XTAL_32K_P | bidirectional | Positive terminal of the 32 kHz oscillator/crystal connection, also usable as GPIO IO MUX function, powered from VDDA_PMU/VBAT. |
| 16 | XTAL_32K_N | bidirectional | Negative terminal of the 32 kHz external clock input/output, also usable as GPIO IO MUX function, powered from VDDA_PMU/VBAT. |
| 17 | CHIP_EN | input | Chip enable: high enables the chip (powered up), low disables it (powered down); do not leave floating. |
| 18 | VBAT | power_in | Analog power domain or battery power supply input for the chip. |
| 19 | VDDA_PMU | power_in | Analog power domain supply input for the power management unit and GPIO12, XTAL_32K_P, XTAL_32K_N. |
| 20 | VDDPST2 | power_in | IO power domain supply for digital IO pins in the second bank. |
| 21 | GPIO22 | bidirectional | Digital IO powered from VDDPST2 with IO MUX functions, not usable in Deep-sleep mode. |
| 22 | U0RXD | bidirectional | UART0 receive data input, powered from VDDPST2, with input enabled and weak pull-up enabled at reset. |
| 23 | U0TXD | bidirectional | UART0 transmit data output, powered from VDDPST2, with input enabled and weak pull-up enabled at reset. |
| 24 | GPIO25 | bidirectional | Digital IO powered from VDDPST2 with input enabled at reset and after reset. |
| 25 | GPIO26 | bidirectional | Digital IO powered from VDDPST2, also usable as USB_D- and ADC analog function; default drive strength 40 mA. |
| 26 | GPIO27 | bidirectional | Digital IO powered from VDDPST2, also usable as USB_D+ and analog function; default drive strength 40 mA and USB pull-up enabled by default. |
| 27 | VDD3P3 | power_in | Analog power domain supply pin for the chip. |
| 28 | XTAL_N | passive | External clock input/output connected to the chip's crystal or oscillator, negative side of the differential clock. |
| 29 | XTAL_P | passive | External clock input/output connected to the chip's crystal or oscillator, positive side of the differential clock. |
| 30 | VDD3P3 | power_in | Analog power domain supply pin for the chip. |
| 31 | VDD3P3 | power_in | Analog power domain supply pin for the chip. |
| 32 | ANT | bidirectional | RF LNA input/output signal connection to the antenna. |
| 33 | GND | power_in | External ground connection, exposed pad of the QFN32 package. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Espressif Systems |
| Package | 32-VFQFN Exposed Pad |
| Category | RF and Wireless |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Allowed input voltage (input power pins) | -0.3 | 3.6 | V | 53 | |||
| Cumulative IO output current | 1.3 | A | 53 | ||||
| Storage temperature | TSTORE | -40 | 150 | °C | 53 | ||
| Recommended input voltage (VDD3P3, VBAT, VDDA_PMU, VDDPST1, VDDPST2) | 3 | 3.3 | 3.6 | V | 53 | ||
| Cumulative input current | IVDD | 0.35 | A | 53 | |||
| Ambient temperature | TA | -40 | 105 | °C | 53 | ||
| Low-level input voltage | VIL | -0.3 | V | 54 | |||
| High-level input current | IIH | 50 | nA | 53 | |||
| Low-level input current | IIL | 50 | nA | 53 | |||
| Chip reset voltage (CHIP_EN voltage is within the specified range) | VIL_nRST | -0.3 | V | CHIP_EN voltage is within the specified range | 54 | ||
| DNL (Differential nonlinearity) | DNL | -8 | 12 | LSB | 54 | ||
| INL (Integral nonlinearity) | INL | -10 | 10 | LSB | 54 | ||
| Sampling rate | 100 | kSPS | 54 | ||||
| Total error, ATTEN0, effective measurement range of 0 ~ 1000 | -7 | 7 | mV | effective measurement range of 0 ~ 1000 | 54 | ||
| Total error, ATTEN1, effective measurement range of 0 ~ 1300 | -8 | 8 | mV | effective measurement range of 0 ~ 1300 | 54 | ||
| Total error, ATTEN2, effective measurement range of 0 ~ 1900 | -12 | 12 | mV | effective measurement range of 0 ~ 1900 | 54 | ||
| Total error, ATTEN3, effective measurement range of 0 ~ 3300 | -23 | 23 | mV | effective measurement range of 0 ~ 3300 | 54 | ||
| Time reserved for power rails to stabilize before CHIP_EN is pulled high | tST BL | 50 | µs | 21 | |||
| Time reserved for CHIP_EN to stay below VIL_nRST to reset the chip | tRST | 50 | µs | 21 | |||
| Bluetooth LE center frequency range of operating channel | 2402 | 2480 | MHz | 58 | |||
| Bluetooth LE RF transmit power range | -24 | 20 | dBm | 58 | |||
| 802.15.4 center frequency range of operating channel | 2405 | 2480 | MHz | 62 | |||
| 802.15.4 RF transmit power range | -24 | 20 | dBm | 62 |
CAD (KiCad official)
- Symbol:
ESP32-H2FH2S - Footprint:
PCM_Espressif:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: 32-VFQFN Exposed Pad (KiCad packages3D, STEP)
- 3D model files:
esp32-h2fh2s-etched.step/esp32-h2fh2s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esp32-h2fh2s.step/esp32-h2fh2s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Espressif Systems datasheet (69 pp, sha256
2cb42839833eac06, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).