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ESP32-H2FH2

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Espressif Systems RF and Wireless, 32-VFQFN Exposed Pad. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ESP32-H2FH2

Espressif Systems · RF and Wireless · 32-VFQFN Exposed Pad

ESP32-H2FH2 from Espressif Systems, in a 32-VFQFN Exposed Pad. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD3P3 power_in Analog power domain supply input; the voltage limits are given in Section 5 of the datasheet and are not in the extracted text.
2 VDD3P3 power_in Analog power domain supply input; the voltage limits are given in Section 5 of the datasheet and are not in the extracted text.
3 GPIO0 bidirectional General-purpose I/O powered from VDDPST1, with SPI2 FSPIQ data signal available via IO MUX function F3.
4 GPIO1 bidirectional General-purpose I/O powered from VDDPST1, with ADC1_CH0 analog input and SPI2 FSPICS0 available via IO MUX.
5 MTMS bidirectional JTAG test mode select on IO MUX function F0, with input enabled at reset; alternatively GPIO2 or ADC1_CH1.
6 MTDO bidirectional JTAG test data out on IO MUX function F0, with input enabled at reset; alternatively GPIO3 or ADC1_CH2.
7 MTCK bidirectional JTAG test clock on IO MUX function F0, with weak pull-up enabled at reset depending on EFUSE_DIS_PAD_JTAG; alternatively GPIO4 or ADC1_CH3.
8 MTDI bidirectional JTAG test data in on IO MUX function F0, with input enabled at reset; alternatively GPIO5 or ADC1_CH4.
9 VDDPST1 power_in IO power domain supply input for the digital IO and LP IO pins.
10 GPIO8 bidirectional LP GPIO powered from VDDPST1 with input enabled at reset.
11 GPIO9 bidirectional LP GPIO powered from VDDPST1 with input enabled and internal weak pull-up enabled at reset.
12 GPIO10 bidirectional LP GPIO powered from VDDPST1, also usable as analog pad voltage comparator input ZCD0.
13 GPIO11 bidirectional LP GPIO powered from VDDPST1, also usable as analog pad voltage comparator input ZCD1.
14 GPIO12 bidirectional LP GPIO powered from VDDA_PMU/VBAT.
15 XTAL_32K_P bidirectional Positive 32 kHz clock signal connected to the chip's oscillator or crystal, powered from VDDA_PMU/VBAT.
16 XTAL_32K_N bidirectional Negative 32 kHz clock signal for 32 kHz external clock input/output, powered from VDDA_PMU/VBAT.
17 CHIP_EN input Chip enable: high enables the chip (powered up) and low disables it (powered down); do not leave this pin floating.
18 VBAT power_in Analog power domain or battery power supply input.
19 VDDA_PMU power_in Analog power domain supply input for GPIO12 and the 32 kHz crystal pins.
20 VDDPST2 power_in IO power domain supply input for the digital IO pins.
21 GPIO22 bidirectional Digital GPIO powered from VDDPST2.
22 U0RXD bidirectional UART0 receive data on IO MUX function F0, with input enabled and weak pull-up enabled at reset; alternatively GPIO23.
23 U0TXD bidirectional UART0 transmit data on IO MUX function F0, with input enabled and weak pull-up enabled at reset; alternatively GPIO24.
24 GPIO25 bidirectional Digital GPIO powered from VDDPST2 with input enabled at reset and after reset.
25 GPIO26 bidirectional Digital GPIO powered from VDDPST2 with input enabled; USB_D- by default, with default drive strength of 40 mA.
26 GPIO27 bidirectional Digital GPIO powered from VDDPST2; USB_D+ by default with USB pull-up enabled, and default drive strength of 40 mA.
27 VDD3P3 power_in Analog power domain supply input; the voltage limits are given in Section 5 of the datasheet and are not in the extracted text.
28 XTAL_N passive External clock input/output connected to the chip's crystal or oscillator.
29 XTAL_P passive Positive side of the differential external clock connected to the chip's crystal or oscillator.
30 VDD3P3 power_in Analog power domain supply input; the voltage limits are given in Section 5 of the datasheet and are not in the extracted text.
31 VDD3P3 power_in Analog power domain supply input; the voltage limits are given in Section 5 of the datasheet and are not in the extracted text.
32 ANT bidirectional RF LNA input/output signals for the antenna connection.
33 GND power_in External ground connection, which is the exposed pad of the QFN32 package.

Key specifications

Parameter Value
Manufacturer Espressif Systems
Package 32-VFQFN Exposed Pad
Category RF and Wireless
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Recommended input voltage 3 3.3 3.6 V VDD3P3, VBAT, VDDA_PMU, VDDPST1, VDDPST2 53
Cumulative input current IVDD 0.35 A 53
Ambient temperature TA -40 105 °C 53
Allowed input voltage -0.3 3.6 V Input power pins 53
Cumulative IO output current Ioutput 1.3 A 53
Storage temperature TSTORE -40 150 °C 53
High-level input current IIH 50 nA 53
Low-level input current IIL 50 nA 53
ADC differential nonlinearity DNL -8 12 LSB 54
ADC integral nonlinearity INL -10 10 LSB 54
ADC sampling rate 100 kSPS 54
ADC total error -7 7 mV ATTEN0, effective measurement range of 0 ~ 1000 54
ADC total error -8 8 mV ATTEN1, effective measurement range of 0 ~ 1300 54
ADC total error -12 12 mV ATTEN2, effective measurement range of 0 ~ 1900 54
ADC total error -23 23 mV ATTEN3, effective measurement range of 0 ~ 3300 54
Bluetooth LE RF transmit power range -24 20 dBm 58
Bluetooth LE sensitivity 1 Mbps -99 dBm @30.8% PER 60
Bluetooth LE maximum received signal 1 Mbps 8 dBm @30.8% PER 60
Bluetooth LE sensitivity 2 Mbps -96 dBm @30.8% PER 60
Bluetooth LE sensitivity 125 Kbps -106.5 dBm @30.8% PER 61
Bluetooth LE sensitivity 500 Kbps -102.5 dBm @30.8% PER 61
802.15.4 RF transmit power range -24 20 dBm 62
802.15.4 sensitivity 250 Kbps -102.5 dBm @1% PER 62
802.15.4 maximum received signal 250 Kbps 8 dBm @1% PER 62
Pin capacitance CIN 2 pF 53
High-level source current IOH 40 mA VDD = 3.3 V, VOH >= 2.64 V, PAD_DRIVER = 3 54
Low-level sink current IOL 28 mA VDD = 3.3 V, VOL = 0.495 V, PAD_DRIVER = 3 54
Internal weak pull-up resistor RPU 45 kΩ 54
Internal weak pull-down resistor RPD 45 kΩ 54
Bluetooth LE TX peak current 140 mA Bluetooth LE @ 20.0 dBm 55
Bluetooth LE RX peak current 24 mA Bluetooth LE 55
Light-sleep current 85 µA CPU and wireless communication modules powered down, peripheral clocks disabled, all GPIOs high-impedance 56
Deep-sleep current 7 µA RTC timer and LP memory powered on 56
Power off current 1 µA CHIP_EN set to low level, chip powered off 56

CAD (KiCad official)

  • Symbol: ESP32-H2FH2
  • Footprint: PCM_Espressif:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: 32-VFQFN Exposed Pad (KiCad packages3D, STEP)
  • 3D model files: esp32-h2fh2-etched.step / esp32-h2fh2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); esp32-h2fh2.step / esp32-h2fh2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Espressif Systems datasheet (69 pp, sha256 2cb42839833eac06, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF