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ESP32-D0WDQ6-V3
Public Made by Adomby adom
Espressif Systems RF Transceiver ICs, QFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ESP32-D0WDQ6-V3
Espressif Systems · RF Transceiver ICs · QFN-48-EP(6x6)
ESP32-D0WDQ6-V3 from Espressif Systems, in a QFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDA | power_in | Analog supply, 2.3 V to 3.6 V. |
| 2 | LNA_IN | bidirectional | RF input to the LNA and RF output from the PA (RF I/O). |
| 3 | VDD3P3 | power_in | Analog supply, 2.3 V to 3.6 V. |
| 4 | VDD3P3 | power_in | Analog supply, 2.3 V to 3.6 V. |
| 5 | SENSOR_VP | input | Input-only GPIO36 with ADC1_CH0 and RTC_GPIO0 functions; no output driver or internal pull resistors. |
| 6 | SENSOR_CAPP | input | Input-only GPIO37 with ADC1_CH1 and RTC_GPIO1 functions; no output driver or internal pull resistors. |
| 7 | SENSOR_CAPN | input | Input-only GPIO38 with ADC1_CH2 and RTC_GPIO2 functions; no output driver or internal pull resistors. |
| 8 | SENSOR_VN | input | Input-only GPIO39 with ADC1_CH3 and RTC_GPIO3 functions; no output driver or internal pull resistors. |
| 9 | CHIP_PU | input | Chip enable: high enables the chip, low shuts it down (VIL_nRST max 0.6 V); must not be left floating. |
| 10 | VDET_1 | input | Input-only GPIO34 with ADC1_CH6 and RTC_GPIO4 functions; no output driver or internal pull resistors. |
| 11 | VDET_2 | input | Input-only GPIO35 with ADC1_CH7 and RTC_GPIO5 functions; no output driver or internal pull resistors. |
| 12 | 32K_XP | bidirectional | GPIO32 (ADC1_CH4, RTC_GPIO9, TOUCH9) also used as 32.768 kHz crystal input. |
| 13 | 32K_XN | bidirectional | GPIO33 (ADC1_CH5, RTC_GPIO8, TOUCH8) also used as 32.768 kHz crystal output. |
| 14 | GPIO25 | bidirectional | General-purpose I/O also providing ADC2_CH8, RTC_GPIO6, DAC_1 and EMAC_RXD0 functions. |
| 15 | GPIO26 | bidirectional | General-purpose I/O also providing ADC2_CH9, RTC_GPIO7, DAC_2 and EMAC_RXD1 functions. |
| 16 | GPIO27 | bidirectional | General-purpose I/O also providing ADC2_CH7, RTC_GPIO17, TOUCH7 and EMAC_RX_DV functions. |
| 17 | MTMS | bidirectional | GPIO14 with JTAG MTMS, HSPICLK, SD_CLK (HS2) and EMAC_TXD2 functions. |
| 18 | MTDI | bidirectional | GPIO12 with JTAG MTDI function; strapping pin that selects VDD_SDIO voltage at reset. |
| 19 | VDD3P3_RTC | power_in | RTC and IO power input, 2.3 V to 3.6 V; also the source for the internal VDD_SDIO LDO. |
| 20 | MTCK | bidirectional | GPIO13 with JTAG MTCK function, ADC2_CH4, TOUCH4 and RTC_GPIO14. |
| 21 | MTDO | bidirectional | GPIO15 with JTAG MTDO function; strapping pin that controls U0TXD printing at reset. |
| 22 | GPIO2 | bidirectional | GPIO2 with ADC2_CH2, TOUCH2 and HSPIWP/SD_DATA0 functions; strapping pin for boot mode together with GPIO0. |
| 23 | GPIO0 | bidirectional | GPIO0 with ADC2_CH1, TOUCH1, CLK_OUT1 and EMAC_TX_CLK functions; strapping pin for boot mode together with GPIO2. |
| 24 | GPIO4 | bidirectional | GPIO4 with ADC2_CH0, TOUCH0, HSPIHD and SD_DATA1 functions. |
| 25 | GPIO16 | bidirectional | GPIO16 with HS1_DATA4, U2RXD and EMAC_CLK_OUT functions; a pull-up is recommended if used for PSRAM CE#. |
| 26 | VDD_SDIO | power_out | Output of the internal LDO supplying 1.8 V or VDD3P3_RTC voltage to the SDIO/flash domain; can also be supplied externally. |
| 27 | GPIO17 | bidirectional | GPIO17 with HS1_DATA5, U2TXD and EMAC_CLK_OUT_180 functions. |
| 28 | SD_DATA_2 | bidirectional | SDIO slave data line 2, also GPIO9 (HS1_DATA2, U1RXD) and SPIHD. |
| 29 | SD_DATA_3 | bidirectional | SDIO slave data line 3, also GPIO10 (HS1_DATA3, U1TXD) and SPIWP. |
| 30 | SD_CMD | bidirectional | SDIO slave command line, also GPIO11 (HS1_CMD, U1RTS) and SPICS0. |
| 31 | SD_CLK | bidirectional | SDIO slave clock input, also GPIO6 (HS1_CLK, U1CTS) and SPICLK. |
| 32 | SD_DATA_0 | bidirectional | SDIO slave data line 0, also GPIO7 (HS1_DATA0, U2RTS) and SPIQ. |
| 33 | SD_DATA_1 | bidirectional | SDIO slave data line 1, also GPIO8 (HS1_DATA1, U2CTS) and SPID. |
| 34 | GPIO5 | bidirectional | GPIO5 with HS1_DATA6, VSPICS0 and EMAC_RX_CLK functions; strapping pin for SDIO slave timing at reset. |
| 35 | GPIO18 | bidirectional | GPIO18 with HS1_DATA7 and VSPICLK functions. |
| 36 | GPIO23 | bidirectional | GPIO23 with HS1_STROBE and VSPID functions. |
| 37 | VDD3P3_CPU | power_in | CPU and digital IO power input, 1.8 V to 3.6 V. |
| 38 | GPIO19 | bidirectional | GPIO19 with U0CTS, VSPIQ and EMAC_TXD0 functions. |
| 39 | GPIO22 | bidirectional | GPIO22 with U0RTS, VSPIWP and EMAC_TXD1 functions. |
| 40 | U0RXD | bidirectional | UART0 receive signal, also GPIO3 and CLK_OUT2. |
| 41 | U0TXD | bidirectional | UART0 transmit signal, also GPIO1, CLK_OUT3 and EMAC_RXD2; strapping-related printing control is via MTDO. |
| 42 | GPIO21 | bidirectional | GPIO21 with VSPIHD and EMAC_TX_EN functions. |
| 43 | VDDA | power_in | Analog supply, 2.3 V to 3.6 V. |
| 44 | XTAL_N | output | External main crystal oscillator output (negative side); connects to an active or passive crystal. |
| 45 | XTAL_P | input | External main crystal oscillator input (positive side); connects to an active or passive crystal. |
| 46 | VDDA | power_in | Analog supply, 2.3 V to 3.6 V. |
| 47 | CAP2 | passive | Connects a 3.3 nF (10%) capacitor in parallel with a 20 kΩ resistor to CAP1. |
| 48 | CAP1 | passive | Connects a 10 nF capacitor in series to ground. |
| 49 | GND | power_in | Ground; the exposed thermal pad of the QFN-48 package. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Espressif Systems |
| Package | QFN-48-EP(6x6) |
| Category | RF And Wireless |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
ESP32-D0WDQ6-V3 - Footprint:
Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.4x4.4mm - 3D model: QFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
esp32-d0wdq6-v3-etched.step/esp32-d0wdq6-v3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esp32-d0wdq6-v3.step/esp32-d0wdq6-v3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Espressif Systems datasheet (74 pp, sha256
bac015371d876744, retrieved 2026-10-13, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ESP32-D0WDQ6-V3
**Espressif Systems** · RF Transceiver ICs · QFN-48-EP(6x6)
ESP32-D0WDQ6-V3 from Espressif Systems, in a QFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDA | power_in | Analog supply, 2.3 V to 3.6 V. |
| 2 | LNA_IN | bidirectional | RF input to the LNA and RF output from the PA (RF I/O). |
| 3 | VDD3P3 | power_in | Analog supply, 2.3 V to 3.6 V. |
| 4 | VDD3P3 | power_in | Analog supply, 2.3 V to 3.6 V. |
| 5 | SENSOR_VP | input | Input-only GPIO36 with ADC1_CH0 and RTC_GPIO0 functions; no output driver or internal pull resistors. |
| 6 | SENSOR_CAPP | input | Input-only GPIO37 with ADC1_CH1 and RTC_GPIO1 functions; no output driver or internal pull resistors. |
| 7 | SENSOR_CAPN | input | Input-only GPIO38 with ADC1_CH2 and RTC_GPIO2 functions; no output driver or internal pull resistors. |
| 8 | SENSOR_VN | input | Input-only GPIO39 with ADC1_CH3 and RTC_GPIO3 functions; no output driver or internal pull resistors. |
| 9 | CHIP_PU | input | Chip enable: high enables the chip, low shuts it down (VIL_nRST max 0.6 V); must not be left floating. |
| 10 | VDET_1 | input | Input-only GPIO34 with ADC1_CH6 and RTC_GPIO4 functions; no output driver or internal pull resistors. |
| 11 | VDET_2 | input | Input-only GPIO35 with ADC1_CH7 and RTC_GPIO5 functions; no output driver or internal pull resistors. |
| 12 | 32K_XP | bidirectional | GPIO32 (ADC1_CH4, RTC_GPIO9, TOUCH9) also used as 32.768 kHz crystal input. |
| 13 | 32K_XN | bidirectional | GPIO33 (ADC1_CH5, RTC_GPIO8, TOUCH8) also used as 32.768 kHz crystal output. |
| 14 | GPIO25 | bidirectional | General-purpose I/O also providing ADC2_CH8, RTC_GPIO6, DAC_1 and EMAC_RXD0 functions. |
| 15 | GPIO26 | bidirectional | General-purpose I/O also providing ADC2_CH9, RTC_GPIO7, DAC_2 and EMAC_RXD1 functions. |
| 16 | GPIO27 | bidirectional | General-purpose I/O also providing ADC2_CH7, RTC_GPIO17, TOUCH7 and EMAC_RX_DV functions. |
| 17 | MTMS | bidirectional | GPIO14 with JTAG MTMS, HSPICLK, SD_CLK (HS2) and EMAC_TXD2 functions. |
| 18 | MTDI | bidirectional | GPIO12 with JTAG MTDI function; strapping pin that selects VDD_SDIO voltage at reset. |
| 19 | VDD3P3_RTC | power_in | RTC and IO power input, 2.3 V to 3.6 V; also the source for the internal VDD_SDIO LDO. |
| 20 | MTCK | bidirectional | GPIO13 with JTAG MTCK function, ADC2_CH4, TOUCH4 and RTC_GPIO14. |
| 21 | MTDO | bidirectional | GPIO15 with JTAG MTDO function; strapping pin that controls U0TXD printing at reset. |
| 22 | GPIO2 | bidirectional | GPIO2 with ADC2_CH2, TOUCH2 and HSPIWP/SD_DATA0 functions; strapping pin for boot mode together with GPIO0. |
| 23 | GPIO0 | bidirectional | GPIO0 with ADC2_CH1, TOUCH1, CLK_OUT1 and EMAC_TX_CLK functions; strapping pin for boot mode together with GPIO2. |
| 24 | GPIO4 | bidirectional | GPIO4 with ADC2_CH0, TOUCH0, HSPIHD and SD_DATA1 functions. |
| 25 | GPIO16 | bidirectional | GPIO16 with HS1_DATA4, U2RXD and EMAC_CLK_OUT functions; a pull-up is recommended if used for PSRAM CE#. |
| 26 | VDD_SDIO | power_out | Output of the internal LDO supplying 1.8 V or VDD3P3_RTC voltage to the SDIO/flash domain; can also be supplied externally. |
| 27 | GPIO17 | bidirectional | GPIO17 with HS1_DATA5, U2TXD and EMAC_CLK_OUT_180 functions. |
| 28 | SD_DATA_2 | bidirectional | SDIO slave data line 2, also GPIO9 (HS1_DATA2, U1RXD) and SPIHD. |
| 29 | SD_DATA_3 | bidirectional | SDIO slave data line 3, also GPIO10 (HS1_DATA3, U1TXD) and SPIWP. |
| 30 | SD_CMD | bidirectional | SDIO slave command line, also GPIO11 (HS1_CMD, U1RTS) and SPICS0. |
| 31 | SD_CLK | bidirectional | SDIO slave clock input, also GPIO6 (HS1_CLK, U1CTS) and SPICLK. |
| 32 | SD_DATA_0 | bidirectional | SDIO slave data line 0, also GPIO7 (HS1_DATA0, U2RTS) and SPIQ. |
| 33 | SD_DATA_1 | bidirectional | SDIO slave data line 1, also GPIO8 (HS1_DATA1, U2CTS) and SPID. |
| 34 | GPIO5 | bidirectional | GPIO5 with HS1_DATA6, VSPICS0 and EMAC_RX_CLK functions; strapping pin for SDIO slave timing at reset. |
| 35 | GPIO18 | bidirectional | GPIO18 with HS1_DATA7 and VSPICLK functions. |
| 36 | GPIO23 | bidirectional | GPIO23 with HS1_STROBE and VSPID functions. |
| 37 | VDD3P3_CPU | power_in | CPU and digital IO power input, 1.8 V to 3.6 V. |
| 38 | GPIO19 | bidirectional | GPIO19 with U0CTS, VSPIQ and EMAC_TXD0 functions. |
| 39 | GPIO22 | bidirectional | GPIO22 with U0RTS, VSPIWP and EMAC_TXD1 functions. |
| 40 | U0RXD | bidirectional | UART0 receive signal, also GPIO3 and CLK_OUT2. |
| 41 | U0TXD | bidirectional | UART0 transmit signal, also GPIO1, CLK_OUT3 and EMAC_RXD2; strapping-related printing control is via MTDO. |
| 42 | GPIO21 | bidirectional | GPIO21 with VSPIHD and EMAC_TX_EN functions. |
| 43 | VDDA | power_in | Analog supply, 2.3 V to 3.6 V. |
| 44 | XTAL_N | output | External main crystal oscillator output (negative side); connects to an active or passive crystal. |
| 45 | XTAL_P | input | External main crystal oscillator input (positive side); connects to an active or passive crystal. |
| 46 | VDDA | power_in | Analog supply, 2.3 V to 3.6 V. |
| 47 | CAP2 | passive | Connects a 3.3 nF (10%) capacitor in parallel with a 20 kΩ resistor to CAP1. |
| 48 | CAP1 | passive | Connects a 10 nF capacitor in series to ground. |
| 49 | GND | power_in | Ground; the exposed thermal pad of the QFN-48 package. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Espressif Systems |
| Package | QFN-48-EP(6x6) |
| Category | RF And Wireless |
| Pins | 49 |
## CAD (KiCad official)
- Symbol: `ESP32-D0WDQ6-V3`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.4x4.4mm`
- 3D model: QFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `esp32-d0wdq6-v3-etched.step` / `esp32-d0wdq6-v3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `esp32-d0wdq6-v3.step` / `esp32-d0wdq6-v3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Espressif Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894197487448065) (74 pp, sha256 `bac015371d876744`, retrieved 2026-10-13, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/esp32-d0wdq6-v3-datasheet.pdf)