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ESDA6V8AV6
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TECH PUBLIC ESD And Surge Protection (TVS/ESD), SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ESDA6V8AV6
TECH PUBLIC · ESD And Surge Protection (TVS/ESD) · SOT-563
ESDA6V8AV6 from TECH PUBLIC, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IO1 | passive | Protected line connection on the bottom row of the SOT563 pin-configuration drawing; ESD rated ±20kV air / ±18kV contact per IEC 61000-4-2, 10pF max junction capacitance IO to Gnd. |
| 2 | GND | power_in | Common ground/return node of the 5-line TVS array, which the drawing shows as the center bottom pin tied to the internal bus; the capacitance spec is stated for IO to Gnd. |
| 3 | IO2 | passive | Protected line connection on the bottom row of the SOT563 pin-configuration drawing; reverse working voltage 5V max, breakdown voltage 6V min at 1mA. |
| 4 | IO3 | passive | Protected line connection on the top row of the SOT563 pin-configuration drawing; reverse working voltage 5V max, clamping voltage 14V max at IPP=4A (8x20us). |
| 5 | IO4 | passive | Protected line connection on the top row, center position, of the SOT563 pin-configuration drawing; reverse leakage 0.1uA max at VRWM=5V. |
| 6 | IO5 | passive | Protected line connection on the top row of the SOT563 pin-configuration drawing; ESD rated ±20kV air / ±18kV contact per IEC 61000-4-2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-563 |
| Category | Circuit Protection |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
ESDA6V8AV6 - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files:
esda6v8av6-etched.step/esda6v8av6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esda6v8av6.step/esda6v8av6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (4 pp, sha256
d58c407eb173c395, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ESDA6V8AV6
**TECH PUBLIC** · ESD And Surge Protection (TVS/ESD) · SOT-563
ESDA6V8AV6 from TECH PUBLIC, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IO1 | passive | Protected line connection on the bottom row of the SOT563 pin-configuration drawing; ESD rated ±20kV air / ±18kV contact per IEC 61000-4-2, 10pF max junction capacitance IO to Gnd. |
| 2 | GND | power_in | Common ground/return node of the 5-line TVS array, which the drawing shows as the center bottom pin tied to the internal bus; the capacitance spec is stated for IO to Gnd. |
| 3 | IO2 | passive | Protected line connection on the bottom row of the SOT563 pin-configuration drawing; reverse working voltage 5V max, breakdown voltage 6V min at 1mA. |
| 4 | IO3 | passive | Protected line connection on the top row of the SOT563 pin-configuration drawing; reverse working voltage 5V max, clamping voltage 14V max at IPP=4A (8x20us). |
| 5 | IO4 | passive | Protected line connection on the top row, center position, of the SOT563 pin-configuration drawing; reverse leakage 0.1uA max at VRWM=5V. |
| 6 | IO5 | passive | Protected line connection on the top row of the SOT563 pin-configuration drawing; ESD rated ±20kV air / ±18kV contact per IEC 61000-4-2. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-563 |
| Category | Circuit Protection |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `ESDA6V8AV6`
- Footprint: `Package_TO_SOT_SMD:SOT-563`
- 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files: `esda6v8av6-etched.step` / `esda6v8av6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `esda6v8av6.step` / `esda6v8av6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589839641391640576) (4 pp, sha256 `d58c407eb173c395`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/esda6v8av6-datasheet.pdf)