component
ESDA6V1SC6Y
Public Made by Adomby adom
STMicroelectronics ESD And Surge Protection (TVS/ESD), SOT-23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ESDA6V1SC6Y
STMicroelectronics · ESD And Surge Protection (TVS/ESD) · SOT-23-6L
ESDA6V1SC6Y from STMicroelectronics, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Protected line 1 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
| 2 | GND | power_in | Common ground node shared by all four Transil functions and internally connected to pin 5. |
| 3 | I/O3 | passive | Protected line 3 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
| 4 | I/O4 | passive | Protected line 4 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
| 5 | GND | power_in | Common ground node shared by all four Transil functions and internally connected to pin 2. |
| 6 | I/O2 | passive | Protected line 2 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-6L |
| Category | Circuit Protection |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
ESDA6V1SC6Y - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files:
esda6v1sc6y-etched.step/esda6v1sc6y-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esda6v1sc6y.step/esda6v1sc6y.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (15 pp, sha256
676b300b76147436, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ESDA6V1SC6Y
**STMicroelectronics** · ESD And Surge Protection (TVS/ESD) · SOT-23-6L
ESDA6V1SC6Y from STMicroelectronics, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Protected line 1 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
| 2 | GND | power_in | Common ground node shared by all four Transil functions and internally connected to pin 5. |
| 3 | I/O3 | passive | Protected line 3 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
| 4 | I/O4 | passive | Protected line 4 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
| 5 | GND | power_in | Common ground node shared by all four Transil functions and internally connected to pin 2. |
| 6 | I/O2 | passive | Protected line 2 of 4 unidirectional Transil channels, with 6.1 V min VBR, 5.2 V max standoff VRM and 19 V max VCL at 18 A (8/20 µs). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-6L |
| Category | Circuit Protection |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `ESDA6V1SC6Y`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `esda6v1sc6y-etched.step` / `esda6v1sc6y-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `esda6v1sc6y.step` / `esda6v1sc6y.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603109398088859648) (15 pp, sha256 `676b300b76147436`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/esda6v1sc6y-datasheet.pdf)