component
ESD7002WTT1G
Public Made by Adomby adom
onsemi TVS, SC-70-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| esd7002wtt1g-etched.glb | 16d ago |
| esd7002wtt1g-etched.step | 16d ago |
| esd7002wtt1g-hero.glb | 16d ago |
| esd7002wtt1g-hero.overlay.json | 16d ago |
| esd7002wtt1g.glb | 16d ago |
| esd7002wtt1g.kicad_mod | 16d ago |
| esd7002wtt1g.kicad_sym | 16d ago |
| esd7002wtt1g.lbr | 16d ago |
| esd7002wtt1g.step | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
ESD7002WTT1G
onsemi · TVS · SC-70-3
ESD7002WTT1G from onsemi, in a SC-70-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Cathode (Style 4) flow-through I/O line 1 protected against ESD up to ±8 kV contact / ±15 kV air (IEC 61000-4-2), 0.3 pF typical to GND, VRWM 16 V. |
| 2 | I/O2 | passive | Cathode (Style 4) flow-through I/O line 2 protected against ESD up to ±8 kV contact / ±15 kV air (IEC 61000-4-2), 0.3 pF typical to GND, VRWM 16 V. |
| 3 | GND | power_in | Anode (Style 4) common ground reference for the ESD protection diodes on I/O1 and I/O2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SC-70-3 |
| Category | Circuit Protection |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Breakdown Voltage | VBR | 16.5 | 23 | V | IT = 1 mA, I/O Pin to GND | 2 | |
| Reverse Working Voltage | VRWM | 16 | V | I/O Pin to GND | 2 | ||
| Reverse Leakage Current | IR | 1 | A | VRWM = 5 V, I/O Pin to GND | 2 | ||
| Junction Capacitance Match | CJ | 5 | 10 | % | VR = 0 V, f = 1 MHz between I/O1 to GND and I/O 2 to GND | 2 | |
| Junction Capacitance (between I/O pins) | CJ | 0.2 | 0.4 | pF | VR = 0 V, f = 1 MHz between I/O Pins | 2 | |
| Junction Capacitance (I/O pins and GND) | CJ | 0.3 | 0.5 | pF | VR = 0 V, f = 1 MHz between I/O Pins and GND | 2 | |
| Operating Junction Temperature Range | TJ | -55 | 125 | °C | 1 | ||
| Storage Temperature Range | Tstg | -55 | 150 | °C | 1 | ||
| Lead Solder Temperature - Maximum | TL | 260 | °C | 10 Seconds | 1 | ||
| IEC 61000-4-2 Contact ESD | ESD | -8 | 8 | kV | 1 | ||
| IEC 61000-4-2 Air ESD | ESD | -15 | 15 | kV | 1 | ||
| Clamping Voltage TLP | VC | 31.2 | V | IPP = 8 A | 2 | ||
| Clamping Voltage TLP | VC | 33.9 | V | IPP = 16 A | 2 | ||
| Clamping Voltage TLP | VC | -5.5 | V | IPP = -8 A | 2 | ||
| Clamping Voltage TLP | VC | -10.8 | V | IPP = -16 A | 2 | ||
| 3dB Bandwidth | fBW | 5 | GHz | RL = 50 Ω | 2 |
CAD (KiCad official)
- Symbol:
ESD7002WTT1G - Footprint:
Package_TO_SOT_SMD:SOT-323_SC-70 - 3D model: SC-70-3 (KiCad packages3D, STEP)
- 3D model files:
esd7002wtt1g-etched.step/esd7002wtt1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esd7002wtt1g.step/esd7002wtt1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (6 pp, sha256
727ec11db9a24dd0, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).