component
ESD24VS2UT-MS
Public Made by Adomby adom
MSKSEMI ESD And Surge Protection (TVS/ESD), SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| esd24vs2ut-ms-etched.glb | 16d ago |
| esd24vs2ut-ms-etched.step | 16d ago |
| esd24vs2ut-ms-hero.glb | 16d ago |
| esd24vs2ut-ms-hero.overlay.json | 16d ago |
| esd24vs2ut-ms.glb | 16d ago |
| esd24vs2ut-ms.kicad_mod | 16d ago |
| esd24vs2ut-ms.kicad_sym | 16d ago |
| esd24vs2ut-ms.lbr | 16d ago |
| esd24vs2ut-ms.step | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
ESD24VS2UT-MS
MSKSEMI · ESD And Surge Protection (TVS/ESD) · SOT-23
ESD24VS2UT-MS from MSKSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Protected line 1, connected through a TVS diode to common pin 3; the diagram shows a bidirectional pair, VRWM 24 V max, VB 26.7 V min. |
| 2 | I/O2 | passive | Protected line 2, connected through a TVS diode to common pin 3; the diagram shows a bidirectional pair, VRWM 24 V max, VB 26.7 V min. |
| 3 | COMMON | passive | Common node shared by the two TVS diodes in the diagram, normally tied to ground; the datasheet gives no pin name. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse stand-off voltage (working voltage) | VRWM | 24 | V | 2 | |||
| Breakdown voltage | VB | 26.7 | V | IT = 1 mA | 2 | ||
| Clamping voltage at 1 A | VC | 43 | V | @ 1 A | 2 | ||
| Clamping voltage at 7 A | VC | 52 | V | @ 7 A | 2 | ||
| Reverse leakage current | IR | 1 | µA | 2 | |||
| Line capacitance | CT | 80 | pF | 2 | |||
| Peak pulse power | PPK | 300 | Watts | tp = 8/20μs | 2 | ||
| Lead soldering temperature | TL | 260 | ℃ | 10 sec | 2 | ||
| Operating temperature (junction) | TJ | -55 | 125 | ℃ | 2 | ||
| Storage temperature | TSTG | -55 | 150 | ℃ | 2 |
CAD (KiCad official)
- Symbol:
ESD24VS2UT-MS - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
esd24vs2ut-ms-etched.step/esd24vs2ut-ms-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esd24vs2ut-ms.step/esd24vs2ut-ms.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (5 pp, sha256
29a535c9ff29d7b6, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).