# ESD15VS2UT-MS

**MSKSEMI** · ESD And Surge Protection (TVS/ESD) · SOT-23

ESD15VS2UT-MS from MSKSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | Protected bidirectional line 1, clamped to the common pin 3 (VRWM 15V max, VB 16.7V min at 1mA for ESD15VS2UT-MS). |
| 2 | I/O2 | passive | Protected bidirectional line 2, clamped to the common pin 3 (VRWM 15V max, VB 16.7V min at 1mA for ESD15VS2UT-MS). |
| 3 | COMMON | passive | Common node of the two protection diodes shown in the package diagram, shared reference for lines 1 and 2. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Working peak reverse voltage | VRWM |  |  | 15 | V |  | 2 |
| Breakdown voltage | VB | 16.7 |  |  | V | Ta=25℃; IT = 1 mA | 2 |
| Clamping voltage at 1 A | VC |  |  | 24 | V | Ta=25℃; @1A | 2 |
| Clamping voltage at 10 A | VC |  |  | 38 | V | Ta=25℃; @10A | 2 |
| Reverse leakage current | IR |  |  | 1 | µA | Ta=25℃ | 2 |
| Capacitance | CT |  |  | 120 | pF | Ta=25℃ | 2 |
| Peak pulse power | PPK |  |  | 300 | Watts | Ta=25℃; tp = 8/20μs | 2 |
| Operating temperature | TJ | -55 |  | 125 | ℃ | Ta=25℃ | 2 |
| Storage temperature | TSTG | -55 |  | 150 | ℃ | Ta=25℃ | 2 |
| Lead soldering temperature | TL |  |  | 260 | ℃ | 10 sec. | 2 |

## CAD (KiCad official)

- Symbol: `ESD15VS2UT-MS`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `esd15vs2ut-ms-etched.step` / `esd15vs2ut-ms-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `esd15vs2ut-ms.step` / `esd15vs2ut-ms.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [MSKSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590229718436765696) (5 pp, sha256 `29a535c9ff29d7b6`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/esd15vs2ut-ms-datasheet.pdf)