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ESD114U102ELE6327XTMA1
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Infineon Technologies ESD Protection Devices, SOD-882. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ESD114U102ELE6327XTMA1
Infineon Technologies · ESD Protection Devices · SOD-882
ESD114U102ELE6327XTMA1 from Infineon Technologies, in a SOD-882. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Pin 1 | passive | Protected line terminal of the uni-directional TVS (pin 1 marking on package), with VRWM 5.3 V max, VBR 6 V min at 1 mA and IR 100 nA max at 5.3 V, all measured from Pin 1 to Pin 2. |
| 2 | Pin 2 | passive | Second terminal of the uni-directional TVS, the return/ground side of the line capacitance of 0.4 pF typ (0.6 pF max) at VR = 0 V, f = 1 MHz, with clamping 20 V typ at 16 A TLP from Pin 1 to Pin 2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOD-882 |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse working voltage | VRWM | 5.3 | V | Pin 1 to Pin 2 | 5 | ||
| Breakdown voltage | VBR | 6 | V | IBR = 1 mA, from Pin 1 to Pin 2 | 5 | ||
| Reverse current | IR | 100 | nA | VR = 5.3 V, from Pin 1 to Pin 2 | 5 | ||
| Line capacitance | CL | 0.4 | 0.6 | pF | VR = 0 V, f = 1 MHz | 5 | |
| ESD contact discharge | VESD | -20 | 20 | kV | IEC61000-4-2 | 4 | |
| Peak pulse current | IPP | -3 | 3 | A | tp = 8/20 μs | 4 | |
| Operating temperature range | TOP | -55 | 125 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Series inductance | LS | 0.4 | nH | ESD114-U1-02EL | 5 | ||
| Clamping voltage | VCL | 10 | V | ITLP = 1 A, from Pin 1 to Pin 2 | 5 | ||
| Clamping voltage | VCL | 20 | V | ITLP = 16 A, from Pin 1 to Pin 2 | 5 | ||
| Clamping voltage | VCL | 28 | V | ITLP = 30 A, from Pin 1 to Pin 2 | 5 | ||
| Clamping voltage | VCL | 3 | V | ITLP = 1 A, from Pin 2 to Pin 1 | 5 | ||
| Clamping voltage | VCL | 15 | V | ITLP = 16 A, from Pin 2 to Pin 1 | 5 | ||
| Clamping voltage | VCL | 21 | V | ITLP = 30 A, from Pin 2 to Pin 1 | 5 | ||
| Dynamic resistance | RDYN | 0.56 | V | Pin 1 to Pin 2 | 5 | ||
| Dynamic resistance | RDYN | 0.43 | V | Pin 2 to Pin 1 | 5 |
CAD (KiCad official)
- Symbol:
ESD114U102ELE6327XTMA1 - Footprint:
Diode_SMD:D_SOD-882 - 3D model: SOD-882 (KiCad packages3D, STEP)
- 3D model files:
esd114u102ele6327xtma1-etched.step/esd114u102ele6327xtma1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);esd114u102ele6327xtma1.step/esd114u102ele6327xtma1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (14 pp, sha256
008866aa70e5a22c, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ESD114U102ELE6327XTMA1
**Infineon Technologies** · ESD Protection Devices · SOD-882
ESD114U102ELE6327XTMA1 from Infineon Technologies, in a SOD-882. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Pin 1 | passive | Protected line terminal of the uni-directional TVS (pin 1 marking on package), with VRWM 5.3 V max, VBR 6 V min at 1 mA and IR 100 nA max at 5.3 V, all measured from Pin 1 to Pin 2. |
| 2 | Pin 2 | passive | Second terminal of the uni-directional TVS, the return/ground side of the line capacitance of 0.4 pF typ (0.6 pF max) at VR = 0 V, f = 1 MHz, with clamping 20 V typ at 16 A TLP from Pin 1 to Pin 2. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOD-882 |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 2 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse working voltage | VRWM | | | 5.3 | V | Pin 1 to Pin 2 | 5 |
| Breakdown voltage | VBR | 6 | | | V | IBR = 1 mA, from Pin 1 to Pin 2 | 5 |
| Reverse current | IR | | | 100 | nA | VR = 5.3 V, from Pin 1 to Pin 2 | 5 |
| Line capacitance | CL | | 0.4 | 0.6 | pF | VR = 0 V, f = 1 MHz | 5 |
| ESD contact discharge | VESD | -20 | | 20 | kV | IEC61000-4-2 | 4 |
| Peak pulse current | IPP | -3 | | 3 | A | tp = 8/20 μs | 4 |
| Operating temperature range | TOP | -55 | | 125 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Series inductance | LS | | 0.4 | | nH | ESD114-U1-02EL | 5 |
| Clamping voltage | VCL | | 10 | | V | ITLP = 1 A, from Pin 1 to Pin 2 | 5 |
| Clamping voltage | VCL | | 20 | | V | ITLP = 16 A, from Pin 1 to Pin 2 | 5 |
| Clamping voltage | VCL | | 28 | | V | ITLP = 30 A, from Pin 1 to Pin 2 | 5 |
| Clamping voltage | VCL | | 3 | | V | ITLP = 1 A, from Pin 2 to Pin 1 | 5 |
| Clamping voltage | VCL | | 15 | | V | ITLP = 16 A, from Pin 2 to Pin 1 | 5 |
| Clamping voltage | VCL | | 21 | | V | ITLP = 30 A, from Pin 2 to Pin 1 | 5 |
| Dynamic resistance | RDYN | | 0.56 | | V | Pin 1 to Pin 2 | 5 |
| Dynamic resistance | RDYN | | 0.43 | | V | Pin 2 to Pin 1 | 5 |
## CAD (KiCad official)
- Symbol: `ESD114U102ELE6327XTMA1`
- Footprint: `Diode_SMD:D_SOD-882`
- 3D model: SOD-882 (KiCad packages3D, STEP)
- 3D model files: `esd114u102ele6327xtma1-etched.step` / `esd114u102ele6327xtma1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `esd114u102ele6327xtma1.step` / `esd114u102ele6327xtma1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](docs/esd114u102ele6327xtma1-datasheet.pdf) (14 pp, sha256 `008866aa70e5a22c`, retrieved 2026-10-22, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/esd114u102ele6327xtma1-datasheet.pdf)