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ES8311

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Everest semi Everest Semiconductor Signal Switches, Multiplexers, Decoders, QFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ES8311

Everest semi Everest Semiconductor · Signal Switches, Multiplexers, Decoders · QFN-20-EP(3x3)

ES8311 from Everest semi Everest Semiconductor, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CCLK input I2C serial clock input for register configuration; the chip address is 0011 00x where x equals CE, and the bus runs at up to 400 kbps.
2 MCLK input Master clock input supporting standard audio clocks, USB 12/24 MHz clocks and other non-standard clocks, with MCLK frequency up to 51.2 MHz.
3 PVDD power_in Power supply for the digital input and output pins, with a recommended operating range of 1.6 V to 3.6 V (3.3 V typical).
4 DVDD power_in Digital core power supply, with a recommended operating range of 1.6 V to 3.6 V (3.3 V typical).
5 DGND power_in Digital ground connection.
6 SCLK/DMIC_SCL bidirectional Serial audio bit clock (I/O) for the I2S/PCM port, which doubles as the DMIC bit clock; SCLK frequency is specified up to 26 MHz.
7 ASDOUT output ADC serial audio data output, with data driven on the falling edge of SCLK.
8 LRCK bidirectional Left/right channel frame clock (I/O) for the serial audio port, with LRCK frequency specified up to 200 kHz.
9 DSDIN input DAC serial audio data input, sampled by the device on the rising edge of SCLK.
10 AGND power_in Analog ground connection.
11 AVDD power_in Analog power supply, with a recommended operating range of 1.7 V to 3.6 V (3.3 V typical).
12 OUTP output Positive side of the differential analog output, with full-scale output level of AVDD/3.3 Vrms.
13 OUTN output Negative side of the differential analog output, with full-scale output level of AVDD/3.3 Vrms.
14 DACVREF passive Filtering capacitor connection for the DAC reference; the datasheet recommends locating decoupling capacitors as close to the package as possible.
15 ADCVREF passive Filtering capacitor connection for the ADC reference; the datasheet recommends locating decoupling capacitors as close to the package as possible.
16 VMID passive Filtering capacitor connection for the mid-rail (VMID) reference.
17 MIC1N input Negative side of the single microphone analog input pair, with 6 kΩ input impedance and full-scale input level of AVDD/3.3 Vrms.
18 MIC1P/DMIC_SDA input Positive side of the microphone analog input pair; also serves as DMIC data (SDA) when digital microphone mode is used.
19 CDATA bidirectional I2C serial data line (I/O) for register read and write access, sampled while CCLK is high.
20 CE input I2C chip address select; its level sets the x bit of the chip address 0011 00x.
21 PGND power_in Ground connection shown as pin 21 (PGND) in the typical application circuit; it is not listed in the pin table.

Key specifications

Parameter Value
Manufacturer Everest semi Everest Semiconductor
Package QFN-20-EP(3x3)
Category Logic
Pins 21

CAD (KiCad official)

  • Symbol: ES8311
  • Footprint: Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm
  • 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: es8311-etched.step / es8311-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); es8311.step / es8311.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Everest semi Everest Semiconductor datasheet (12 pp, sha256 69cc689b6afbd586, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF