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ES8156

Everest semi Everest Semiconductor · ADCs/DACs - Special Purpose · QFN-20-EP(3x3)

ES8156 from Everest semi Everest Semiconductor, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CDATA bidirectional I2C serial data line, bidirectional, supporting transfer rates up to 400 kbps.
2 CCLK input I2C serial clock input, with data sampled during CCLK high at up to 400 kbps.
3 MCLK input Master clock input, up to 49.2 MHz.
4 DVDD power_in Digital power supply, recommended 1.6 V to 3.6 V (3.3 V typical).
5 PVDD power_in Power supply for the digital input and output, recommended 1.6 V to 3.6 V (3.3 V typical).
6 DGND power_in Digital ground.
7 SCLK bidirectional Serial data bit clock (or DMIC bit clock), input in slave mode and output in master mode, up to 26 MHz.
8 SDIN input DAC serial data input, sampled on the rising edge of SCLK.
9 LRCK bidirectional Serial data left and right channel frame clock, input in slave mode and output in master mode, up to 200 kHz.
10 HPCOM passive Analog virtual ground for capless headphone, only available in software mode.
11 ROUTP output Right channel differential analog output, positive.
12 ROUTN output Right channel differential analog output, negative.
13 AGND power_in Analog ground.
14 LOUTN output Left channel differential analog output, negative.
15 LOUTP output Left channel differential analog output, positive.
16 AVDD power_in Analog power supply, recommended 1.7 V to 3.6 V (3.3 V typical).
17 VRP passive Filtering capacitor connection (1 uF shown in the typical application circuit).
18 VMID passive Filtering capacitor connection (1 uF shown in the typical application circuit).
19 CE input I2C chip address select; the chip address is 0001 00x where x equals CE.
20 SDOUT output Playback signal feedback serial data output, driven on the falling edge of SCLK.
21 PGND power_in Exposed pad, shown as PGND pin 21 in the typical application circuit and connected to system ground.

Key specifications

Parameter Value
Manufacturer Everest semi Everest Semiconductor
Package QFN-20-EP(3x3)
Category Data Acquisition
Pins 21

CAD (KiCad official)

  • Symbol: ES8156
  • Footprint: Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm
  • 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: es8156-etched.step / es8156-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); es8156.step / es8156.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Everest semi Everest Semiconductor datasheet (12 pp, sha256 2ebdfd79fa11c1f8, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF