component
ES3G-E3
Public Made by Adomby adom
Vishay Intertech Diodes - General Purpose, SMC(DO-214AB). Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention, KiCad symbol/footprint/3D.
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ES3G-E3
Vishay Intertech · Diodes - General Purpose · SMC(DO-214AB)
ES3G-E3 from Vishay Intertech, in a SMC(DO-214AB). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SMC(DO-214AB) |
| Category | Diodes |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum repetitive peak reverse voltage | VRRM | 400 | V | 1 | |||
| Working peak reverse voltage | VRWM | 300 | V | 1 | |||
| Maximum RMS voltage | VRMS | 280 | V | 1 | |||
| Maximum average forward rectified current | IF(AV) | 3 | A | TL = 110 °C | 1 | ||
| Peak forward surge current | IFSM | 100 | A | 8.3 ms single half sine-wave superimposed on rated load | 1 | ||
| Operating junction and storage temperature range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Maximum instantaneous forward voltage | VF | 1.1 | V | 3.0 A; pulse test 300 µs pulse width, 1 % duty cycle | 2 | ||
| Maximum DC reverse current at working peak reverse voltage | IR | 10 | µA | TA = 25 °C | 2 | ||
| Maximum DC reverse current at working peak reverse voltage | IR | 350 | µA | TA = 100 °C | 2 | ||
| Maximum reverse recovery time | trr | 35 | ns | IF = 0.5 A, IR = 1.0 A, Irr = 0.25 A | 2 | ||
| Maximum reverse recovery time | trr | 50 | ns | IF = 1.0 A, dI/dt = 100 A/µs, VR = 30 V, Irr = 0.1 IRM | 2 | ||
| Maximum reverse recovery current | IRM | 3 | A | IF = 1.0 A, dI/dt = 100 A/µs, VR = 30 V, Irr = 0.1 IRM | 2 | ||
| Maximum stored charge | Qrr | 50 | nC | IF = 1.0 A, dI/dt = 100 A/µs, VR = 30 V, Irr = 0.1 IRM | 2 | ||
| Typical thermal resistance, junction to ambient | RJA | 50 | °C/W | Units mounted on PCB 5.0 mm x 5.0 mm land areas | 2 | ||
| Typical thermal resistance, junction to lead | RJL | 15 | °C/W | Units mounted on PCB 5.0 mm x 5.0 mm land areas | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 | 1 |
CAD (KiCad official)
- Symbol:
ES3G-E3 - Footprint:
Diode_SMD:D_SMC - 3D model: SMC(DO-214AB) (KiCad packages3D, STEP)
- 3D model files:
es3g-e3-etched.step/es3g-e3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);es3g-e3.step/es3g-e3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (5 pp, sha256
28549c9d0ccf165c, retrieved 2026-10-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins, primarycathode-band convention(convention), consensusoff(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ES3G-E3
**Vishay Intertech** · Diodes - General Purpose · SMC(DO-214AB)
ES3G-E3 from Vishay Intertech, in a SMC(DO-214AB). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SMC(DO-214AB) |
| Category | Diodes |
| Pins | 2 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum repetitive peak reverse voltage | VRRM | | | 400 | V | | 1 |
| Working peak reverse voltage | VRWM | | | 300 | V | | 1 |
| Maximum RMS voltage | VRMS | | | 280 | V | | 1 |
| Maximum average forward rectified current | IF(AV) | | | 3 | A | TL = 110 °C | 1 |
| Peak forward surge current | IFSM | | | 100 | A | 8.3 ms single half sine-wave superimposed on rated load | 1 |
| Operating junction and storage temperature range | TJ, TSTG | -55 | | 150 | °C | | 1 |
| Maximum instantaneous forward voltage | VF | | | 1.1 | V | 3.0 A; pulse test 300 µs pulse width, 1 % duty cycle | 2 |
| Maximum DC reverse current at working peak reverse voltage | IR | | | 10 | µA | TA = 25 °C | 2 |
| Maximum DC reverse current at working peak reverse voltage | IR | | | 350 | µA | TA = 100 °C | 2 |
| Maximum reverse recovery time | trr | | | 35 | ns | IF = 0.5 A, IR = 1.0 A, Irr = 0.25 A | 2 |
| Maximum reverse recovery time | trr | | | 50 | ns | IF = 1.0 A, dI/dt = 100 A/µs, VR = 30 V, Irr = 0.1 IRM | 2 |
| Maximum reverse recovery current | IRM | | | 3 | A | IF = 1.0 A, dI/dt = 100 A/µs, VR = 30 V, Irr = 0.1 IRM | 2 |
| Maximum stored charge | Qrr | | | 50 | nC | IF = 1.0 A, dI/dt = 100 A/µs, VR = 30 V, Irr = 0.1 IRM | 2 |
| Typical thermal resistance, junction to ambient | RJA | | 50 | | °C/W | Units mounted on PCB 5.0 mm x 5.0 mm land areas | 2 |
| Typical thermal resistance, junction to lead | RJL | | 15 | | °C/W | Units mounted on PCB 5.0 mm x 5.0 mm land areas | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 | 1 |
## CAD (KiCad official)
- Symbol: `ES3G-E3`
- Footprint: `Diode_SMD:D_SMC`
- 3D model: SMC(DO-214AB) (KiCad packages3D, STEP)
- 3D model files: `es3g-e3-etched.step` / `es3g-e3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `es3g-e3.step` / `es3g-e3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](docs/es3g-e3-datasheet.pdf) (5 pp, sha256 `28549c9d0ccf165c`, retrieved 2026-10-21, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins`, primary `cathode-band convention` (convention), consensus `off` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/es3g-e3-datasheet.pdf)