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ES1DHE3_A

Vishay Intertech · High Effic Rectifier · SMA(DO-214AC)

ES1DHE3_A from Vishay Intertech, in a SMA(DO-214AC). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K passive Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint.
2 A passive Anode.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SMA(DO-214AC)
Category Diodes
Pins 2

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum repetitive peak reverse voltage VRRM 200 V ES1D 1
Maximum RMS voltage VRMS 140 V ES1D 1
Maximum DC blocking voltage VDC 200 V ES1D 1
Maximum average forward rectified current IF(AV) 1 A fig. 1 1
Peak forward surge current IFSM 30 A 8.3 ms single half sine-wave superimposed on rated load 1
Operating junction and storage temperature range TJ, TSTG -55 150 °C 1
Maximum instantaneous forward voltage VF 0.865 V IF = 0.6 A 2
Maximum instantaneous forward voltage VF 0.92 V IF = 1.0 A 2
Maximum DC reverse current at rated DC blocking voltage IR 5 μA TA = 25 °C 2
Maximum DC reverse current at rated DC blocking voltage IR 100 μA TA = 100 °C 2
Maximum reverse recovery time trr 15 ns IF = 0.5 A, IR = 1.0 A, lrr = 0.25 A 2
Maximum reverse recovery time trr 25 ns IF = 0.6 A, VR = 30 V, dI/dt = 50 A/μs, Irr = 10 % IRM, TJ = 25 °C 2
Maximum reverse recovery time trr 35 ns IF = 0.6 A, VR = 30 V, dI/dt = 50 A/μs, Irr = 10 % IRM, TJ = 100 °C 2
Maximum stored charge Qrr 10 nC IF = 0.6 A, VR = 30 V, dI/dt = 50 A/μs, Irr = 10 % IRM, TJ = 25 °C 2
Maximum stored charge Qrr 25 nC IF = 0.6 A, VR = 30 V, dI/dt = 50 A/μs, Irr = 10 % IRM, TJ = 100 °C 2
Typical junction capacitance CJ 10 pF 4.0 V, 1 MHz 2
Typical thermal resistance, junction to ambient RθJA 85 °C/W Units mounted on PCB 5.0 mm x 5.0 mm (0.013 mm thick) land areas 2
Typical thermal resistance, junction to lead RθJL 35 °C/W Units mounted on PCB 5.0 mm x 5.0 mm (0.013 mm thick) land areas 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Terminals: matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 1

CAD (KiCad official)

  • Symbol: ES1DHE3_A
  • Footprint: Diode_SMD:D_SMA
  • 3D model: SMA(DO-214AC) (KiCad packages3D, STEP)
  • 3D model files: es1dhe3-a-etched.step / es1dhe3-a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); es1dhe3-a.step / es1dhe3-a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (5 pp, sha256 6215dc1d5c185921, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins, primary cathode-band convention (convention), consensus off (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF