component
EPCS4SI8N
Public Made by Adomby adom
Intel/Altera Non-Volatile Memory (ROM), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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EPCS4SI8N
Intel/Altera · Non-Volatile Memory (ROM) · SOIC-8
EPCS4SI8N from Intel/Altera, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | nCS | input | Chip select: low enables the device (active), high deselects it and tri-states DATA; a falling edge is required after power-up before any operation. |
| 2 | DATA | output | Serial data output to the FPGA during read operation or configuration, transitioning on the falling edge of DCLK. |
| 3 | VCC | power_in | Power pin, connect to a 3.3-V power supply (2.7 V to 3.6 V operation). |
| 4 | GND | power_in | Ground pin. |
| 5 | ASDI | input | AS data input that serially receives instructions and data to be programmed, latched on the rising edge of DCLK. |
| 6 | DCLK | input | Serial clock provided by the FPGA that times the serial interface; ASDI is latched on the rising edge. |
| 7 | VCC | power_in | Power pin, connect to a 3.3-V power supply (2.7 V to 3.6 V operation). |
| 8 | VCC | power_in | Power pin, connect to a 3.3-V power supply (2.7 V to 3.6 V operation). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Intel/Altera |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
EPCS4SI8N - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
epcs4si8n-etched.step/epcs4si8n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);epcs4si8n.step/epcs4si8n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Intel/Altera datasheet (40 pp, sha256
4c08591a67e2cd71, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# EPCS4SI8N
**Intel/Altera** · Non-Volatile Memory (ROM) · SOIC-8
EPCS4SI8N from Intel/Altera, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | nCS | input | Chip select: low enables the device (active), high deselects it and tri-states DATA; a falling edge is required after power-up before any operation. |
| 2 | DATA | output | Serial data output to the FPGA during read operation or configuration, transitioning on the falling edge of DCLK. |
| 3 | VCC | power_in | Power pin, connect to a 3.3-V power supply (2.7 V to 3.6 V operation). |
| 4 | GND | power_in | Ground pin. |
| 5 | ASDI | input | AS data input that serially receives instructions and data to be programmed, latched on the rising edge of DCLK. |
| 6 | DCLK | input | Serial clock provided by the FPGA that times the serial interface; ASDI is latched on the rising edge. |
| 7 | VCC | power_in | Power pin, connect to a 3.3-V power supply (2.7 V to 3.6 V operation). |
| 8 | VCC | power_in | Power pin, connect to a 3.3-V power supply (2.7 V to 3.6 V operation). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Intel/Altera |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `EPCS4SI8N`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `epcs4si8n-etched.step` / `epcs4si8n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `epcs4si8n.step` / `epcs4si8n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Intel/Altera datasheet](docs/epcs4si8n-datasheet.pdf) (40 pp, sha256 `4c08591a67e2cd71`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/epcs4si8n-datasheet.pdf)