EPCQ16ASI8N

{
  "slug": "epcq16asi8n",
  "version": "0.1.0",
  "type": "component",
  "description": "Intel/Altera Programmable Logic Device (CPLDs/FPGAs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "epcq16asi8n",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "epcq16asi8n.kicad_sym",
    "epcq16asi8n.kicad_mod",
    "epcq16asi8n.glb",
    "epcq16asi8n.step",
    "epcq16asi8n.lbr",
    "docs/hero.png",
    "docs/epcq16asi8n-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "epcq16asi8n-hero.glb",
    "epcq16asi8n-hero.overlay.json",
    "epcq16asi8n-etched.glb"
  ],
  "component": {
    "mpn": "EPCQ16ASI8N",
    "manufacturer": "Intel/Altera",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Programmable Logic Device (CPLDs/FPGAs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/18640896e9aa808900f83493d9959e44.pdf",
    "parts": {
      "symbol": "epcq16asi8n.kicad_sym",
      "footprint": "epcq16asi8n.kicad_mod",
      "model_3d": "epcq16asi8n-hero.glb",
      "model_3d_plain": "epcq16asi8n-etched.glb",
      "model_3d_step": "epcq16asi8n-etched.step",
      "model_3d_step_plain": "epcq16asi8n.step",
      "lbr": "epcq16asi8n.lbr"
    },
    "distributor_links": {
      "lcsc": "C467192"
    },
    "distributor_check": {
      "checked_at": "2026-10-22T22:40:04Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "deferred",
        "error": "shared DigiKey quota guard: 951 calls left today"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "nCS",
        "type": "input",
        "description": "Active-low chip select that toggles at the beginning and end of a valid operation; when high the device is deselected and DATA[3:0] are tri-stated, and a falling edge is required after power up before any operation."
      },
      {
        "number": "2",
        "name": "DATA1",
        "type": "bidirectional",
        "description": "In AS x1 and x4 modes outputs serial data to the FPGA on falling DCLK edges during read or configuration, and acts as an input during quad input fast write bytes."
      },
      {
        "number": "3",
        "name": "DATA2",
        "type": "bidirectional",
        "description": "In AS x4 mode outputs serial data to the FPGA on falling DCLK edges during read or configuration operations; in AS x1 mode this pin must connect to VCC."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "5",
        "name": "DATA0",
        "type": "bidirectional",
        "description": "In AS x1 mode it is the data input for write or program, latched at rising DCLK edges; in AS x4 mode it is an I/O pin that inputs data during write and outputs data on falling DCLK edges during read or configuration."
      },
      {
        "number": "6",
        "name": "DCLK",
        "type": "input",
        "description": "Serial clock provided by the FPGA; data on DATA[3:0] is latched into the device on rising DCLK edges and changes after the falling edge."
      },
      {
        "number": "7",
        "name": "DATA3",
        "type": "bidirectional",
        "description": "In AS x4 mode outputs serial data to the FPGA on falling DCLK edges during read or configuration operations; in AS x1 mode this pin must connect to VCC."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect the power pins to a 3.3-V power supply."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pins 3 and 7 are DATA2/DATA3 in AS x4 mode but must be tied to VCC in AS x1 mode (the AS x1 diagram ; Pin types were inferred from the pin descriptions (DATA pins listed as I/O); the datasheet's absolut"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0777,
        "at": "2026-10-22T22:39:52"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/18640896e9aa808900f83493d9959e44.pdf",
        "pages": 38,
        "sha256": "9e780703f73f2e7c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "epcq16asi8n.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "epcq16asi8n-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "826e9235af558f620a91554cc170572e95296f26e32aa097a5aac88525400d48",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}