component

EL7252CSZ

Public Made by Adom

by adom

RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsel7252cszfactory-2.0.0extractor-text

Verified EL7252CSZ

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EL7252CSZ · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 9-page datasheet
  • ✓distributor: lcsc C1549362, digikey EL7252CSZ-ND, mouser 968-EL7252CSZ
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-tgi4ezu3/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ el7252csz.kicad_sym✓ el7252csz.kicad_mod✓ el7252csz.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers el7252csz: viewers · Ray 10d ago
el7252csz-etched.glb Publish 0.1.0 · Ray 10d ago
el7252csz-etched.step el7252csz: factory component page (tier=mfr) · Ray 10d ago
el7252csz-hero.glb el7252csz: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
el7252csz-hero.overlay.json Publish 0.1.0 · Ray 10d ago
el7252csz.glb Publish 0.1.0 · Ray 10d ago
el7252csz.kicad_mod Publish 0.1.0 · Ray 10d ago
el7252csz.kicad_sym Publish 0.1.0 · Ray 10d ago
el7252csz.lbr Publish 0.1.0 · Ray 10d ago
el7252csz.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 10d ago

EL7252CSZ

RENESAS · Pre-ordered Chips · SOIC-8

EL7252CSZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A IN input Logic input for driver channel A, with VIH of 2.4 V min, VIL of 0.8 V max, and 0.3 V input hysteresis; input pins are limited to -0.3 V to +0.3 V above V+ (absolute maximum).
2 B IN input Logic input for driver channel B, with VIH of 2.4 V min, VIL of 0.8 V max, and 0.3 V input hysteresis; input pins are limited to -0.3 V to +0.3 V above V+ (absolute maximum).
3 C IN input Logic input C, with VIH of 2.4 V min, VIL of 0.8 V max, and 0.3 V input hysteresis; input pins are limited to -0.3 V to +0.3 V above V+ (absolute maximum).
4 D IN input Logic input D, with VIH of 2.4 V min, VIL of 0.8 V max, and 0.3 V input hysteresis; input pins are limited to -0.3 V to +0.3 V above V+ (absolute maximum).
5 GND power_in Ground reference pin; the datasheet gives no separate electrical limit for this pin.
6 OUT B output Driver output for channel B, rated for 2 A peak source and sink current and 100 mA continuous current.
7 OUT A output Driver output for channel A, rated for 2 A peak source and sink current and 100 mA continuous current.
8 V+ power_in Positive supply pin with an operating range of 4.5 V to 16 V and an absolute maximum supply of 16.5 V.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (V+ to GND) 16.5 V 3
Input pins voltage -0.3 0.3 V Referenced to V+ (printed as -0.3V to +0.3V above V+) 3
Combined peak output current 4 A 3
Storage temperature range -65 150 °C 3
Ambient operating temperature -40 85 °C 3
Operating junction temperature 125 °C 3
Operating voltage VS 4.5 16 V TA = +25°C, V = 15V, unless otherwise specified 3
Logic 1 input voltage VIH 2.4 V TA = +25°C, V = 15V, unless otherwise specified 3
Logic 0 input voltage VIL 0.8 V TA = +25°C, V = 15V, unless otherwise specified 3
Logic 1 input current IIH 0.1 10 µA @V+; TA = +25°C, V = 15V, unless otherwise specified 3
Logic 0 input current IIL 0.1 10 µA @0V; TA = +25°C, V = 15V, unless otherwise specified 3
Pull-up resistance ROH 3 6 IOUT = -100mA; TA = +25°C, V = 15V, unless otherwise specified 3
Pull-down resistance ROL 4 6 IOUT = +100mA; TA = +25°C, V = 15V, unless otherwise specified 3
Continuous output current source/sink IDC 100 mA Source/Sink; TA = +25°C, V = 15V, unless otherwise specified 3
Power supply current IS 1 2.5 mA Inputs high; TA = +25°C, V = 15V, unless otherwise specified 3
Rise time tR 10 ns CL = 500pF (Note 2) 3
Rise time tR 20 ns CL = 1000pF (Note 2) 3
Fall time tF 10 ns CL = 500pF (Note 2) 3
Fall time tF 20 ns CL = 1000pF (Note 2) 3
Turn-on delay time tD-ON 20 25 ns Note 2; TA = +25°C, V = 15V, unless otherwise specified 3
Turn-off delay time tD-OFF 20 25 ns Note 2; TA = +25°C, V = 15V, unless otherwise specified 3
Hysteresis (input) VHVS 0.3 V TA = +25°C, V = 15V, unless otherwise specified 3
Peak output current source IPK 2 A Source; TA = +25°C, V = 15V, unless otherwise specified 3
Peak output current sink IPK 2 A Sink; TA = +25°C, V = 15V, unless otherwise specified 3
Junction-to-ambient thermal resistance (SO8) 175 °C/W SO8 package, as annotated on the derating figure 5

CAD (KiCad official)

  • Symbol: EL7252CSZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: el7252csz-etched.step / el7252csz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); el7252csz.step / el7252csz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (9 pp, sha256 723b4e9da5c0fc38, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF