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EL7232CSZ-T7

Public Made by Adom

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RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsel7232csz-t7factory-2.0.0extractor-text

Verified EL7232CSZ-T7

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EL7232CSZ-T7 · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 8-page datasheet
  • ✓distributor: lcsc C2671328, digikey EL7232CSZ-T7TR-ND, mouser 968-EL7232CSZ-T7
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ux0eahcu/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.7)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ el7232csz-t7.kicad_sym✓ el7232csz-t7.kicad_mod✓ el7232csz-t7.step
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Ray Publish 0.1.0 f2921c3 9d ago

EL7232CSZ-T7

RENESAS · Pre-ordered Chips · SOIC-8

EL7232CSZ-T7 from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 3-STATE A input Active-high 3-state enable for channel A; when low, the A output is open (high impedance), and logic inputs are 2.4V min for high and 0.8V max for low.
2 A IN input Channel A logic input, inverted at A OUT when enabled, with TTL-compatible thresholds (VIH 2.4V min, VIL 0.8V max) and 0.3V typical hysteresis.
3 3-STATE B input Active-high 3-state enable for channel B; when low, the B output is open (high impedance), and logic inputs are 2.4V min for high and 0.8V max for low.
4 B IN input Channel B logic input, inverted at B OUT when enabled, with TTL-compatible thresholds (VIH 2.4V min, VIL 0.8V max) and 0.3V typical hysteresis.
5 GND power_in Ground reference for the supply, with V+ to GND rated 16.5V maximum.
6 B OUT output Channel B 3-state inverting driver output with 2A typical peak source/sink, 100mA continuous, and 3 to 6 ohm pull-up and 4 to 6 ohm pull-down resistance.
7 A OUT output Channel A 3-state inverting driver output with 2A typical peak source/sink, 100mA continuous, and 3 to 6 ohm pull-up and 4 to 6 ohm pull-down resistance.
8 V+ power_in Positive supply with operating range 4.5V to 16V and absolute maximum 16.5V to GND.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Logic 1 Input Voltage VIH 2.4 V TA=+25°C, V=15V 2
Logic 1 Input Current IIH 0.1 10 µA @V+ 2
Logic 0 Input Voltage VIL 0.8 V 2
Logic 0 Input Current IIL 0.1 10 µA @0V 2
Pull-Up Resistance ROH 3 6 Ω IOUT = -100mA 2
Pull-Down Resistance ROL 4 6 Ω IOUT = +100mA 2
3-State Output Leakage IOFF 0.2 10 µA VOUT = V+, VOUT = 0V 2
Peak Output Current Source/Sink IPK 2 A Source, Sink 2
Continuous Output Current Source/Sink IDC 100 mA Source/Sink 2
Power Supply Current IS 1 2.5 mA Inputs High 2
Operating Voltage VS 4.5 16 V 2
Fall Time tF 13 20 ns CL = 1000pF 2
Turn-On Delay Time tD-ON 18 25 ns 2
Turn-Off Delay Time tD-OFF 20 25 ns 2
Supply Voltage (V+ to Gnd) V+ 16.5 V TA=+25°C 2
Input Pins -0.3 0.3 V -0.3V to +0.3V above V+ 2
Combined Peak Output Current 4 A 2
Operating Junction Temperature TJ 125 °C 2
Storage Temperature Range -65 150 °C 2
Ambient Operating Temperature TA -40 85 °C 2
Input Hysteresis VHVS 0.3 V 2
Rise Time tR 7.5 ns CL = 500pF 2
Rise Time tR 10 ns CL = 1000pF 2
Fall Time tF 10 ns CL = 500pF 2
Three-State Delay, Enable HIZ-ON 22 ns 2
Three-State Delay, Disable HIZ-OFF 22 ns 2

CAD (KiCad official)

  • Symbol: EL7232CSZ-T7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: el7232csz-t7-etched.step / el7232csz-t7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); el7232csz-t7.step / el7232csz-t7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (8 pp, sha256 e163c0f35f5063b1, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF