# EL7222CSZ-T7

**RENESAS** · Pre-ordered Chips · SOIC-8

EL7222CSZ-T7 from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect pin with no internal function stated in the datasheet. |
| 2 | IN A | input | Channel A logic input with VIH min 2.4V, VIL max 0.8V and about 0.3V hysteresis, inverted at OUT A. |
| 3 | GND | power_in | Ground reference for the supply and both driver channels. |
| 4 | IN B | input | Channel B logic input with VIH min 2.4V, VIL max 0.8V and about 0.3V hysteresis, non-inverted at OUT B. |
| 5 | OUT B | output | Channel B non-inverting driver output with 2A peak source/sink current and 100mA continuous output current. |
| 6 | V+ | power_in | Positive supply input with operating voltage range of 4.5V to 15V and 16.5V absolute maximum. |
| 7 | OUT A | output | Channel A inverting driver output with 2A peak source/sink current and 100mA continuous output current. |
| 8 | NC | unconnected | No connect pin with no internal function stated in the datasheet. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic 1 Input Voltage | VIH | 2.4 |  |  | V | TA = 25°C, V = 15V | 3 |
| Logic 1 Input Current | IIH |  | 0.1 | 10 | µA | @V+ | 3 |
| Logic 0 Input Voltage | VIL |  |  | 0.8 | V | TA = 25°C, V = 15V | 3 |
| Logic 0 Input Current | IIL |  | 0.1 | 10 | µA | @0V | 3 |
| Pull-Up Resistance | ROH |  | 3 | 6 | Ω | IOUT = -100mA | 3 |
| Pull-Down Resistance | ROL |  | 4 | 6 | Ω | IOUT = +100mA | 3 |
| Peak Output Current Source | IPK |  | 2 |  | A | Source | 3 |
| Peak Output Current Sink | IPK |  | 2 |  | A | Sink | 3 |
| Power Supply Current | IS |  | 2.5 | 5 | mA | Inputs High/EL7222 | 3 |
| Operating Voltage | VS | 4.5 |  | 15 | V |  | 3 |
| Turn-On Delay Time | tD1 |  | 18 | 25 | ns | See Timing Table | 3 |
| Turn-Off Delay Time | tD2 |  | 20 | 25 | ns | See Timing Table | 3 |
| Supply Voltage | V+ |  |  | 16.5 | V | V+ to Gnd | 3 |
| Input Pins |  | -0.3 |  | 0.3 | V | -0.3V to +0.3V above V+ | 3 |
| Combined Peak Output Current |  |  |  | 4 | A |  | 3 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 3 |
| Ambient Operating Temperature |  | -40 |  | 85 | °C |  | 3 |
| Operating Junction Temperature |  |  |  | 125 | °C |  | 3 |
| Hysteresis | VHVS |  | 0.3 |  | V | Input Hysteresis | 3 |
| Continuous Output Current | IDC |  |  | 100 | mA | Source/Sink | 3 |

## CAD (KiCad official)

- Symbol: `EL7222CSZ-T7`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `el7222csz-t7-etched.step` / `el7222csz-t7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `el7222csz-t7.step` / `el7222csz-t7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RENESAS datasheet](docs/el7222csz-t7-datasheet.pdf) (9 pp, sha256 `51f9ee22c05692a0`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/el7222csz-t7-datasheet.pdf)