EL7156CSZ

{
  "slug": "el7156csz",
  "version": "0.1.0",
  "type": "component",
  "description": "RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "el7156csz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "el7156csz.kicad_sym",
    "el7156csz.kicad_mod",
    "el7156csz.glb",
    "el7156csz.step",
    "el7156csz.lbr",
    "docs/hero.png",
    "docs/el7156csz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "el7156csz-hero.glb",
    "el7156csz-hero.overlay.json",
    "el7156csz-etched.glb"
  ],
  "component": {
    "mpn": "EL7156CSZ",
    "manufacturer": "RENESAS",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Interface ICs",
    "subcategory": "Pre-ordered Chips",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/e783f5ebb71999fdee02de259bbb2c81.pdf",
    "parts": {
      "symbol": "el7156csz.kicad_sym",
      "footprint": "el7156csz.kicad_mod",
      "model_3d": "el7156csz-hero.glb",
      "model_3d_plain": "el7156csz-etched.glb",
      "model_3d_step": "el7156csz-etched.step",
      "model_3d_step_plain": "el7156csz.step",
      "lbr": "el7156csz.lbr"
    },
    "distributor_links": {
      "lcsc": "C1524126",
      "digikey": "EL7156CSZ-ND",
      "mouser": "968-EL7156CSZ"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T16:17:11Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "EL7156CSZ-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "968-EL7156CSZ",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VS+",
        "type": "power_in",
        "description": "Positive supply voltage; the EL7156 is designed for supplies from 5V to 15V (4.5V to 16.5V maximum), with VS+ to VS- rated 5V to 16.5V in the operating voltage range."
      },
      {
        "number": "2",
        "name": "OE",
        "type": "input",
        "description": "Output enable, active low; when OE is low both output switches open and OUT goes three-state (floating) between VL and VH."
      },
      {
        "number": "3",
        "name": "IN",
        "type": "input",
        "description": "Logic input that selects OUT = VH when IN is low and OUT = VL when IN is high (with OE high); VIH is at least 2.4V and VIL is at most 0.8V at VS+ = 15V, and inputs are compatible with 3V and 5V CMOS signals."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device; the VS- to GND range is -5V to 0V and VS+ to GND is 5V to 16.5V."
      },
      {
        "number": "5",
        "name": "VS-",
        "type": "power_in",
        "description": "Negative supply voltage; VS+ to VS- must stay within 5V to 16.5V and VL to VS- within 0V to 16.5V per the operating voltage range."
      },
      {
        "number": "6",
        "name": "VL",
        "type": "power_in",
        "description": "Lower output voltage that OUT is switched to when IN is high; VL must remain below VH, otherwise the output-stage body diode turns on."
      },
      {
        "number": "7",
        "name": "OUT",
        "type": "output",
        "description": "Driver output that connects to VH or VL depending on IN; it sources and sinks 3.5A peak in linear resistive operation and 200mA continuous."
      },
      {
        "number": "8",
        "name": "VH",
        "type": "power_in",
        "description": "High output voltage that OUT is switched to when IN is low; VH must remain above VL, and VH to VS+ is limited to 0V to 16.5V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet gives one pinout that is shared by the 8 Ld PDIP and 8 Ld SOIC packages. The ordering ; The datasheet does not assign KiCad types. VH and VL are the high and low output-voltage rails and a"
        ],
        "pages_sent": 11,
        "cost_usd": 0.0543,
        "at": "2026-10-30T16:16:52"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/e783f5ebb71999fdee02de259bbb2c81.pdf",
        "pages": 11,
        "sha256": "a8fe800ad7a2249d",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "el7156csz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dc0d65603051a0acd313dc0c425aafe2af321ba67f9ccccbab26a2c87676cfb5",
        "checked": "2026-10-30",
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  }
}