component

EL7156CSZ

Public Made by Adom

by adom

RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsel7156cszfactory-2.0.0extractor-text

Verified EL7156CSZ

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EL7156CSZ · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 11-page datasheet
  • ✓distributor: lcsc C1524126, digikey EL7156CSZ-ND, mouser 968-EL7156CSZ
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-48yveb98/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ el7156csz.kicad_sym✓ el7156csz.kicad_mod✓ el7156csz.step
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Ray Publish 0.1.0 db85be5 11d ago

EL7156CSZ

RENESAS · Pre-ordered Chips · SOIC-8

EL7156CSZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VS+ power_in Positive supply voltage; the EL7156 is designed for supplies from 5V to 15V (4.5V to 16.5V maximum), with VS+ to VS- rated 5V to 16.5V in the operating voltage range.
2 OE input Output enable, active low; when OE is low both output switches open and OUT goes three-state (floating) between VL and VH.
3 IN input Logic input that selects OUT = VH when IN is low and OUT = VL when IN is high (with OE high); VIH is at least 2.4V and VIL is at most 0.8V at VS+ = 15V, and inputs are compatible with 3V and 5V CMOS signals.
4 GND power_in Ground reference for the device; the VS- to GND range is -5V to 0V and VS+ to GND is 5V to 16.5V.
5 VS- power_in Negative supply voltage; VS+ to VS- must stay within 5V to 16.5V and VL to VS- within 0V to 16.5V per the operating voltage range.
6 VL power_in Lower output voltage that OUT is switched to when IN is high; VL must remain below VH, otherwise the output-stage body diode turns on.
7 OUT output Driver output that connects to VH or VL depending on IN; it sources and sinks 3.5A peak in linear resistive operation and 200mA continuous.
8 VH power_in High output voltage that OUT is switched to when IN is low; VH must remain above VL, and VH to VS+ is limited to 0V to 16.5V.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Logic '1' Input Voltage (VS+=+15V table) VIH 2.4 V Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C 2
Logic '1' Input Current (VS+=+15V table) IIH 0.1 10 µA Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C; VIH = VS+ 2
Logic '0' Input Voltage (VS+=+15V table) VIL 0.8 V Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C 2
Logic '0' Input Current (VS+=+15V table) IIL 0.1 10 µA Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C; VIL = 0V 2
ON-Resistance VH to OUT (VS+=+15V table) ROVH 2.7 4.5 Ω Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C; IOUT = -200 mA 2
ON-Resistance VL to OUT (VS+=+15V table) ROVL 3.5 5.5 Ω Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C; IOUT = +200 mA 2
Output Leakage Current (VS+=+15V table) IOUT 0.1 10 µA Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C; OE = 0V, OUT = VH/VL 2
Power Supply Current (VS+=+15V table) IS 1.3 3 mA Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C; Inputs = VS+ 2
Off Leakage at VH and VL (VS+=+15V table) IVH 4 10 µA Table VS+=+15V, VH=+15V, VL=0V, VS-=0V, TA=+25°C; VH, VL = 0V 2
Logic '1' Input Voltage (VS+=+5V table) VIH 2 V Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C 3
Logic '1' Input Current (VS+=+5V table) IIH 0.1 10 µA Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C; VIH = VS+ 3
Logic '0' Input Voltage (VS+=+5V table) VIL 0.8 V Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C 3
Logic '0' Input Current (VS+=+5V table) IIL 0.1 10 µA Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C; VIL = 0V 3
ON-Resistance VH to OUT (VS+=+5V table) ROVH 3.4 5 Ω Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C; IOUT = -200mA 3
ON-Resistance VL to OUT (VS+=+5V table) ROVL 4 6 Ω Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C; IOUT = +200mA 3
Output Leakage Current (VS+=+5V table) IOUT 0.1 10 µA Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C; OE = 0V, OUT = VH/VL 3
Power Supply Current (VS+=+5V table) IS 1 2.5 mA Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C; Inputs = VS+ 3
Off Leakage at VH and VL (VS+=+5V table) 4 10 µA Table VS+=+5V, VH=+5V, VL=-5V, VS-=-5V, TA=+25°C; VH, VL = 0V 3
Supply Voltage (VS+ to VS-) 18 V TA = +25°C 2
Continuous Output Current 200 mA 2
Storage Temperature Range -65 150 °C 2
Ambient Operating Temperature -40 85 °C 2
Operating Junction Temperature 125 °C 2
VS- to GND operating voltage range -5 0 V Operating Voltage Range table 6
VS+ to VS- operating voltage range 5 16.5 V Operating Voltage Range table 6
VH to VL operating voltage range 0 16.5 V Operating Voltage Range table 6
VS+ to VH operating voltage range 0 16.5 V Operating Voltage Range table 6
VS+ to GND operating voltage range 5 16.5 V Operating Voltage Range table 6
VL to VS- operating voltage range 0 16.5 V Operating Voltage Range table 6
Junction-to-ambient thermal resistance (SOIC8) θJA 160 °C/W SOIC8 package, standard JEDEC JESD51-3 single-layer test board 8

CAD (KiCad official)

  • Symbol: EL7156CSZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: el7156csz-etched.step / el7156csz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); el7156csz.step / el7156csz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (11 pp, sha256 a8fe800ad7a2249d, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF