component

EL7104CNZ

Public Made by Adom

by adom

RENESAS Pre-ordered Chips, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsel7104cnzfactory-2.0.0extractor-text

Verified EL7104CNZ

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EL7104CNZ · PDIP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 7-page datasheet
  • ✓distributor: lcsc C1549554, digikey EL7104CNZ-ND, mouser 968-EL7104CNZ
  • ✓family: DIP-8_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-iajxtlrm/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ el7104cnz.kicad_sym✓ el7104cnz.kicad_mod✓ el7104cnz.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers el7104cnz: viewers · Ray 10d ago
el7104cnz-etched.glb Publish 0.1.0 · Ray 10d ago
el7104cnz-etched.step el7104cnz: factory component page (tier=mfr) · Ray 10d ago
el7104cnz-hero.glb el7104cnz: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
el7104cnz-hero.overlay.json Publish 0.1.0 · Ray 10d ago
el7104cnz.glb Publish 0.1.0 · Ray 10d ago
el7104cnz.kicad_mod Publish 0.1.0 · Ray 10d ago
el7104cnz.kicad_sym Publish 0.1.0 · Ray 10d ago
el7104cnz.lbr Publish 0.1.0 · Ray 10d ago
el7104cnz.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 10d ago

EL7104CNZ

RENESAS · Pre-ordered Chips · PDIP-8

EL7104CNZ from RENESAS, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 V+ power_in Positive supply, operating range 4.5V to 16V (absolute maximum 16.5V to GND).
2 IN input Logic input with VIH min 2.4V, VIL max 0.8V and 0.3V typical hysteresis; may not exceed 0.3V above V+ or go below -0.3V.
3 NC unconnected No connection.
4 GND power_in Ground reference for the supply and driver.
5 GND power_in Ground reference for the supply and driver.
6 N_OUT output Separate N-channel drain output (pull-down) with 2 ohm typical pull-down resistance, 4A peak and 200mA continuous sink current.
7 P_OUT output Separate P-channel drain output (pull-up) with 1.5 ohm typical pull-up resistance, 4A peak and 200mA continuous source current.
8 V+ power_in Positive supply, operating range 4.5V to 16V (absolute maximum 16.5V to GND).

Key specifications

Parameter Value
Manufacturer RENESAS
Package PDIP-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Logic 1 Input Voltage VIH 2.4 V V+ = 15V, TA = 25°C 2
Logic 1 Input Current IIH 0.1 10 µA @V+ 2
Logic 0 Input Voltage VIL 0.8 V V+ = 15V, TA = 25°C 2
Logic 0 Input Current IIL 0.1 10 µA @0V 2
Pull-Up Resistance ROH 1.5 4 Ω IOUT = -100mA 2
Pull-Down Resistance ROL 2 4 Ω IOUT = +100mA 2
Output Leakage Current IOUT 0.2 10 µA V+/GND 2
Power Supply Current IS 4.5 7.5 mA Input = V+ 2
Operating Voltage VS 4.5 16 V 2
Rise Time tR 10 20 ns CL = 2000pF 2
Fall Time tF 15 20 ns CL = 2000pF 2
Turn-On Delay Time tD-ON 18 25 ns See Timing Table 2
Turn-Off Delay Time tD-OFF 18 25 ns See Timing Table 2
Supply Voltage (V+ to GND) V+ 16.5 V TA = 25°C 2
Input Pins -0.3 0.3 V above V+ (-0.3V to +0.3V above V+) 2
Peak Output Current IPK 4 A TA = 25°C 2
Ambient Operating Temperature TA -40 85 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Operating Junction Temperature TJ 125 °C 2
Input Hysteresis VHVS 0.3 V 2
Peak Output Current Source/Sink IPK 4 A 2
Continuous Output Current Source/Sink IDC 200 mA 2
Rise Time tR 7.5 ns CL = 1000pF 2
Fall Time tF 10 ns CL = 1000pF 2

CAD (KiCad official)

  • Symbol: EL7104CNZ
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: el7104cnz-etched.step / el7104cnz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); el7104cnz.step / el7104cnz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (7 pp, sha256 ffa84394d4f2bf28, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF