EGL41B-E3
Public Made by Adomby adom
Vishay Intertech Fast Recovery / High Efficiency Diodes, DO-213AB. Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention, KiCad symbol/footprint/3D.
EGL41B-E3
Vishay Intertech · Fast Recovery / High Efficiency Diodes · DO-213AB
EGL41B-E3 from Vishay Intertech, in a DO-213AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | DO-213AB |
| Category | Diodes |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum repetitive peak reverse voltage | VRRM | 100 | V | 1 | |||
| Maximum RMS voltage | VRMS | 70 | V | 1 | |||
| Maximum DC blocking voltage | VDC | 100 | V | 1 | |||
| Maximum average forward rectified current | IF(AV) | 1 | A | TT = 75 °C | 1 | ||
| Peak forward surge current | IFSM | 30 | A | 8.3 ms single half sine-wave superimposed on rated load | 1 | ||
| Operating junction and storage temperature range | TJ, TSTG | -65 | 175 | °C | 1 | ||
| Max. instantaneous forward voltage | VF | 1 | V | 1.0 A; pulse test 300 μs pulse width, 1 % duty cycle | 2 | ||
| Max. DC reverse current at rated DC blocking voltage | IR | 5 | μA | TA = 25 °C | 2 | ||
| Max. DC reverse current at rated DC blocking voltage | IR | 50 | μA | TA = 125 °C | 2 | ||
| Max. reverse recovery time | trr | 50 | ns | IF = 0.5 A, IR = 1.0 A, Irr = 0.25 A | 2 | ||
| Maximum thermal resistance junction to ambient | RθJA | 60 | °C/W | Junction to ambient, 0.24" x 0.24" (6.0 mm x 6.0 mm) copper pads to each terminal (note 1) | 2 | ||
| Maximum thermal resistance junction to terminal | RθJT | 30 | °C/W | Junction to terminal, 0.24" x 0.24" (6.0 mm x 6.0 mm) copper pads to each terminal (note 2) | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 | 1 |
CAD (KiCad official)
- Symbol:
EGL41B-E3 - Footprint:
Diode_SMD:D_MELF - 3D model: DO-213AB (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (4 pp, sha256
9b380b47f5f89d3d, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins, primarycathode-band convention(convention), consensusoff(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# EGL41B-E3
**Vishay Intertech** · Fast Recovery / High Efficiency Diodes · DO-213AB
EGL41B-E3 from Vishay Intertech, in a DO-213AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | DO-213AB |
| Category | Diodes |
| Pins | 2 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum repetitive peak reverse voltage | VRRM | | | 100 | V | | 1 |
| Maximum RMS voltage | VRMS | | | 70 | V | | 1 |
| Maximum DC blocking voltage | VDC | | | 100 | V | | 1 |
| Maximum average forward rectified current | IF(AV) | | | 1 | A | TT = 75 °C | 1 |
| Peak forward surge current | IFSM | | | 30 | A | 8.3 ms single half sine-wave superimposed on rated load | 1 |
| Operating junction and storage temperature range | TJ, TSTG | -65 | | 175 | °C | | 1 |
| Max. instantaneous forward voltage | VF | | | 1 | V | 1.0 A; pulse test 300 μs pulse width, 1 % duty cycle | 2 |
| Max. DC reverse current at rated DC blocking voltage | IR | | | 5 | μA | TA = 25 °C | 2 |
| Max. DC reverse current at rated DC blocking voltage | IR | | | 50 | μA | TA = 125 °C | 2 |
| Max. reverse recovery time | trr | | | 50 | ns | IF = 0.5 A, IR = 1.0 A, Irr = 0.25 A | 2 |
| Maximum thermal resistance junction to ambient | RθJA | | | 60 | °C/W | Junction to ambient, 0.24" x 0.24" (6.0 mm x 6.0 mm) copper pads to each terminal (note 1) | 2 |
| Maximum thermal resistance junction to terminal | RθJT | | | 30 | °C/W | Junction to terminal, 0.24" x 0.24" (6.0 mm x 6.0 mm) copper pads to each terminal (note 2) | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 | 1 |
## CAD (KiCad official)
- Symbol: `EGL41B-E3`
- Footprint: `Diode_SMD:D_MELF`
- 3D model: DO-213AB (KiCad packages3D, STEP)
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603114133747617792) (4 pp, sha256 `9b380b47f5f89d3d`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins`, primary `cathode-band convention` (convention), consensus `off` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/egl41b-e3-datasheet.pdf)