component
EG7500
Public Made by Adomby adom
EG Micro AC-DC Controllers & Regulators, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
| eg7500-etched.glb | 12d ago |
| eg7500-etched.step | 12d ago |
| eg7500-hero.glb | 12d ago |
| eg7500-hero.overlay.json | 12d ago |
| eg7500.glb | 12d ago |
| eg7500.kicad_mod | 12d ago |
| eg7500.kicad_sym | 12d ago |
| eg7500.lbr | 12d ago |
| eg7500.step | 12d ago |
| package.json | 12d ago |
| page.json | 12d ago |
| README.md | 12d ago |
EG7500
EG Micro · AC-DC Controllers & Regulators · SOP-16
EG7500 from EG Micro, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1IN+ | input | Non-inverting input of error amplifier 1. |
| 2 | 1IN- | input | Inverting input of error amplifier 1. |
| 3 | FEEDBACK | input | Feedback input; the feedback terminal input current is limited to 0.3 mA maximum. |
| 4 | DTC | input | Dead-time control terminal, which sets the output dead time. |
| 5 | CT | input | Connection for the oscillator timing capacitor, with 0.00047 uF to 10 uF allowed. |
| 6 | RT | input | Connection for the oscillator timing resistor, with 1.8 KΩ to 500 KΩ allowed. |
| 7 | GND | power_in | Signal ground of the chip. |
| 8 | C1 | output | Collector of internal driver transistor 1, rated at 40 V maximum and 200 mA maximum per transistor. |
| 9 | E1 | output | Emitter of internal driver transistor 1. |
| 10 | E2 | output | Emitter of internal driver transistor 2. |
| 11 | C2 | output | Collector of internal driver transistor 2, rated at 40 V maximum and 200 mA maximum per transistor. |
| 12 | Vcc | power_in | Power supply input; the datasheet gives a range of 7 V to 40 V with a maximum rating of 40 V. |
| 13 | OUTPUT CTRL | input | Output state control: when high, the two internal driver transistors alternate conduction; when low, they conduct or cut off together so only one switch is controlled. |
| 14 | REF | output | Internal 5 V reference voltage output (5.0 V typical, ±1%), with output current limited to 10 mA maximum. |
| 15 | 2IN- | input | Inverting input of error amplifier 2. |
| 16 | 2IN+ | input | Non-inverting input of error amplifier 2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | EG Micro |
| Package | SOP-16 |
| Category | Power Management ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 电源输入 | VCC | 7 | 40 | V | 8 | ||
| 集电极电压 | VC1, VC2 | 40 | V | 8 | |||
| 集电极电压输出电流(单个晶体管) | IC1,IC2 | 200 | mA | 8 | |||
| 运放输入电压 | VI | -0.3 | V | 8 | |||
| 反馈端输入电流 | IFB | 0.3 | mA | 8 | |||
| 基准电压输出电流 | IREF | 10 | mA | 8 | |||
| 振荡器电容 | CT | 0.00047 | 10 | uF | 8 | ||
| 振荡器电阻 | RT | 1.8 | 500 | KΩ | 8 | ||
| 振荡器工作频率 | Fosc | 1 | 200 | KHz | 8 | ||
| PWM 输入电压 | VINPWM | 0.3 | 5.3 | V | 8 | ||
| 环境温度 | TA | -40 | 85 | ℃ | 8 | ||
| 储存温度 | Tstr | -65 | 125 | ℃ | 8 | ||
| 焊接温度 | TL | 300 | ℃ | T=10S | 8 | ||
| 电源 | Vcc | 7 | 15 | 40 | V | 9 | |
| 静态电流 | Icc | 6 | 10 | mA | 9 | ||
| 基准电压 | VREF | 4.95 | 5 | 5.05 | V | IREF=1mA | 9 |
| 线性调整率 | ΔVREF | 2 | 25 | mV | VCC=7 to 40V | 9 | |
| 负载调整率 | ΔVREF | 20 | 50 | mV | IREF=1mA to 20mA | 9 | |
| 短路输出电流 | ISC | 10 | 35 | 50 | mA | VREF=0 | 9 |
| 振荡器频率 | fosc | 9.2 | 10 | 10.8 | KHz | CT=0.01uF, RT=12KΩ | 9 |
| 温度漂移 | Δf/ΔT | -1 | 1 | % | CT=0.001uF, RT=30KΩ, TA=-40 to 85 ºC | 9 | |
| 输入失调电压 | VIO | 2 | 10 | mV | VO(FEEDBACK) =2.5V | 9 | |
| 输入失调电流 | IOS | 25 | 250 | uA | VO(FEEDBACK) =2.5V | 9 | |
| 输入偏置电流 | Ibias | 0.2 | 1 | uA | VO(FEEDBACK) =2.5V | 9 | |
| 开环增益 | AVOL | 70 | 95 | dB | VO=0.5V to 3.5V | 9 | |
| 共模电压输入范围 | VCM | -0.3 | V | VCC=7 to 36V | 9 | ||
| 共模抑制比 | CMRR | 65 | 80 | dB | 9 | ||
| 输出 Sink 电流 | ISINK | -0.3 | -0.7 | mA | VID=-15mV to -5V, VO(FEEDBACK) =0.7V | 9 | |
| 输出 Source 电流 | ISOURCE | 2 | mA | VID=15mV to 5V, VO(FEEDBACK) =0.7V | 9 | ||
| PWM 比较器输入阈值电压(0%占空比) | VITH | 4 | 4.5 | V | 0%占空比 | 9 | |
| PWM 比较器输入 Sink 电流 | ISINK | -0.3 | -0.7 | mA | VO(FEEDBACK) =0.7V | 9 | |
| 死区控制输入偏置电流 | IBIAS | -2 | -10 | uA | VCC=15V, V4=0 to 5.25V | 9 | |
| 最大占空比 | D(MAX) | 45 | % | VCC=15V, V4=0V, Pin13 = VREF | 9 | ||
| 输入阈值电压(零占空比) | VITH | 3 | 3.3 | V | 零占空比 | 10 | |
| 输入阈值电压(最大占空比) | VITH | 0 | V | 最大占空比 | 10 | ||
| 输出饱和电压 共发射极 | VCE(SAT) | 1.1 | 1.3 | V | VE=0V,IC=200mA | 10 | |
| 输出饱和电压 射极跟随 | VCC(SAT) | 1.5 | 2.5 | V | VCC=15V,IE=-200mA | 10 | |
| 集电极 off 状态电流 | IC(OFF) | 2 | 100 | uA | VCE=36V,VCC=36V | 10 | |
| 发射极 off 状态电流 | IE(OFF) | -100 | uA | VCC=VC=36V,VE=0V | 10 | ||
| 上升时间 | tR | 100 | 200 | nS | 共发射极 共集电极 | 10 | |
| 下降时间 | tF | 25 | 100 | nS | 共发射极 共集电极 | 10 |
CAD (KiCad official)
- Symbol:
EG7500 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
eg7500-etched.step/eg7500-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eg7500.step/eg7500.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: EG Micro datasheet (12 pp, sha256
6fe4889c115c41d5, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).