# EG6562

**EG Micro** · AC-DC Controllers And Regulators · SOP-8

EG6562 from EG Micro, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INV | input | Error amplifier inverting input, compared against the internal 2.5V reference; the output is disabled when INV falls below 0.2V and re-enabled above 0.45V. |
| 2 | COMP | output | Error amplifier output, with a high level of 5.2V typical (5 to 6V) and a low level of 2.25V. |
| 3 | MULT | input | Multiplier input with a linear operating range of 0 to 3V and an input current of 1uA. |
| 4 | CS | input | Current sense input for cycle-by-cycle current limit, with a 1.08V typical comparison voltage and 200ns leading-edge blanking. |
| 5 | ZCD | input | Zero-current detector input that triggers when the voltage falls below 0.7V, with a 1.4V rising-edge threshold and internal clamps at 5.7V high and 0V low. |
| 6 | GND | power_in | Chip ground. |
| 7 | GD | output | Totem-pole gate drive output for the power switch, rated 0.8A source and 0.8A sink with an 18V maximum output clamp. |
| 8 | VCC | power_in | Chip supply with an operating range of 10.5V to 30V, UVLO turn-on threshold of 12.5V typical and turn-off threshold of 9.7V typical, and a 30V zener clamp at 10mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | EG Micro |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.3 |  | 30 | V |  | 8 |
| VCC clamp current | Iclamp |  |  | 10 | mA |  | 8 |
| ZCD clamp current | Izcd |  |  | 10 | mA |  | 8 |
| INV, COMP, MULT, CS low-voltage pins voltage |  |  |  | 6 | V |  | 8 |
| GD output pin voltage (datasheet max printed as VCC+0.3 V, not numeric) |  | -0.3 |  |  | V |  | 8 |
| Ambient operating temperature | TA | -45 |  | 125 | ℃ |  | 8 |
| Storage temperature | Tstr | -65 |  | 150 | ℃ |  | 8 |
| Soldering temperature | TL |  |  | 300 | ℃ | T=10S | 8 |
| VCC supply range | VCC | 10.5 |  | 30 | V |  | 8 |
| VCC turn-on threshold | UVLO_OFF | 11.7 | 12.5 | 13.3 | V | TA=25℃, VCC=15V (table default) | 8 |
| VCC turn-off threshold | UVLO_ON | 9.2 | 9.7 | 10.2 | V | TA=25℃, VCC=15V (table default) | 8 |
| Startup current | Istart |  |  | 50 | uA | Before turn-on, VCC=11V | 8 |
| Quiescent current (feedback at 2.5 V) | Iq |  | 2.33 | 4 | mA | VINV =2.5 | 8 |
| Quiescent current (feedback below 150 mV) | Iq |  | 0.82 | 2 | mA | VINV<150mV | 8 |
| MULT input current | IMULT |  |  | 1 | uA | VMULT=0-4V | 8 |
| MULT linear operating range | VMULT | 0 |  | 3 | V |  | 8 |
| Maximum output slope VCS/VMULT | VCS/VMULT |  | 1 | 1.1 | V | VMULT=0-1V, VCOMP=5.5V | 8 |
| Multiplier gain K | K |  | 0.38 |  | V | VMULT=1V, VCOMP=4V | 8 |
| Feedback input voltage | VINV | 2.475 | 2.5 | 2.525 | V | TJ=25℃ | 9 |
| Feedback input voltage over supply | VINV | 2.465 |  | 2.535 | V | 12V<VCC<29V | 9 |
| Feedback line regulation | VINV |  | 2 | 5 | mV | 12V<VCC<29V | 9 |
| Feedback input bias current | IINV |  |  | 1 | uA | VINV=0 to 3V | 9 |
| Open-loop voltage gain | GV | 60 |  | 80 | dB | Open loop | 9 |
| Gain-bandwidth product | GB |  | 1 |  | MHz |  | 9 |
| COMP output source current | ICOMP+ | 2 |  | 3.6 | mA | VCOMP=4V, VINV=2.4V | 9 |
| COMP output sink current | ICOMP- | 2.5 |  | 4.3 | mA | VCOMP=4V, VINV=2.6V | 9 |
| COMP output high voltage | VCOMPH | 5 | 5.2 | 6 | V | VINV=2.4V, ICOMP+=0.5mA | 9 |
| COMP output low voltage | VCOMPL |  |  | 2.25 | V | VINV=2.6V, ICOMP-=0.5mA | 9 |
| Feedback disable threshold | VINVdis |  | 200 |  | mV |  | 9 |
| Feedback enable threshold | VINVen |  | 450 |  | mV |  | 9 |
| Dynamic OVP trigger current | IOVP |  | 32 |  | uA |  | 9 |
| Dynamic OVP hysteresis | Hys |  | 20 |  | uA |  | 9 |
| Static OVP threshold |  |  | 2.25 |  | V |  | 9 |
| CS input bias current | ICS |  |  | 2 | uA | VCS=0 | 9 |
| Leading-edge blanking time | TLEB |  | 200 |  | nS |  | 9 |
| Current comparison voltage | VCS | 1 | 1.08 | 1.16 | V |  | 9 |
| Current sense offset voltage | VCSoffset |  | 2.6 |  | mV | VMULT=0V | 9 |
| Current sense offset voltage | VCSoffset |  | 34 |  | mV | VMULT=2.5V | 9 |
| ZCD high voltage clamp | VZCDH |  | 5.7 |  | V | IZCD=2.5mA | 9 |
| ZCD low voltage clamp | VZCDL | -0.3 | 0 | 0.3 | V | IZCD=-2.5mA | 9 |
| ZCD input bias current | IZCD |  |  | 2 | uA | VZCD=1 to 4.5V | 9 |
| ZCD rising-edge trigger voltage | VZCDUP |  | 1.4 |  | V |  | 9 |
| ZCD falling-edge trigger voltage | VZCDDN |  | 0.7 |  | V |  | 9 |
| ZCD output source current | IZCD+ |  | 2.5 |  | mA |  | 9 |
| ZCD output sink current | IZCD- |  | 2.5 |  | mA |  | 9 |
| Startup timer period | Tstart | 80 | 170 | 300 | uS |  | 9 |
| GD low output voltage | VOL |  | 0.6 | 1.2 | V | Isink=100mA | 10 |
| GD high output voltage | VOH | 14 |  | 14.5 | V | Isource=5mA | 10 |
| GD maximum output clamp voltage | VO_clamp |  |  | 18 | V |  | 10 |
| GD output rise time | T_r | 60 |  | 110 | ns | GD=1nF | 10 |
| GD output fall time | T_f | 30 |  | 70 | ns | GD=1nF | 10 |
| GD output source current (peak) | IO+ |  |  | 0.8 | A |  | 10 |
| GD output sink current (peak) | IO- |  |  | 0.8 | A |  | 10 |

## CAD (KiCad official)

- Symbol: `EG6562`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `eg6562-etched.step` / `eg6562-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eg6562.step` / `eg6562.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [EG Micro datasheet](docs/eg6562-datasheet.pdf) (19 pp, sha256 `b6cdb56a681188d1`, retrieved 2026-11-04, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/eg6562-datasheet.pdf)