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EG3113

Public Made by Adom

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EG Micro Gate Drive ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icseg3113factory-2.0.0extractor-text

Verified EG3113

by Ray · last 4 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

4 Nov 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EG3113 · SOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 12-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-2av4oi74/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ eg3113.kicad_sym✓ eg3113.kicad_mod✓ eg3113.step
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Ray Publish 0.1.0 15bf823 2d ago

EG3113

EG Micro · Gate Drive ICs · SOP-8

EG3113 from EG Micro, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Vcc power_in Supply input for the chip, specified from 2.8V to 20V, with a 0.1uF high-frequency bypass capacitor recommended close to the pin.
2 HIN input High-side logic input, active high, controls the HO output; internal 200K pull-down, with high level at 2.5V or above and low level at 1.0V or below.
3 LIN input Low-side logic input, active low, controls the LO output; internal pull-up to 5V, with high level at 2.5V or above and low level at 1.0V or below.
4 GND power_in Ground reference pin for the chip.
5 LO output Low-side gate drive output that controls the low-side power MOSFET, with peak sink 2.5A and peak source 2A.
6 VS power_in High-side floating ground reference; the datasheet limits VS to VB-20V through VB+0.3V.
7 HO output High-side gate drive output that controls the high-side power MOSFET; the limit is VS-0.3V to VB+0.3V.
8 VB power_in High-side floating bootstrap supply; the absolute maximum rating for VB is -0.3V to 600V.

Key specifications

Parameter Value
Manufacturer EG Micro
Package SOP-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VB (high-side floating, absolute maximum) VB -0.3 600 V 7
Supply voltage VCC (absolute maximum) VCC -0.3 20 V 7
LIN logic input voltage (absolute maximum) LIN -0.3 6 V 7
Ambient temperature (absolute maximum range) TA -45 125 ℃ 7
Storage temperature Tstr -55 150 ℃ 7
Soldering temperature TL 300 ℃ T=10S 7
Supply voltage VCC (typical drive, high-voltage MOSFET) VCC 10 15 V Recommended typical value for driving high-voltage MOSFETs 10
Supply voltage VCC (low-voltage MOSFET drive) VCC 2.8 10 V Recommended value for driving low-voltage MOSFETs 10
Supply voltage Vcc Vcc 2.8 12 20 V 8
Static current Icc 30 uA Inputs floating, Vcc=12V 8
Logic input high voltage Vin(H) 2.5 V All input control signals 8
Logic input low voltage Vin(L) -0.3 0 1 V All input control signals 8
Logic input high-level current Iin(H) 20 uA Vin=5V 8
Logic input low-level current Iin(L) -20 uA Vin=0V 8
LO turn-on delay Ton 280 400 nS See Fig 7-1 8
LO turn-off delay Toff 125 300 nS See Fig 7-1 8
LO rise time Tr 120 200 nS See Fig 7-1 8
LO fall time Tf 80 100 nS See Fig 7-1 8
HO turn-on delay Ton 250 400 nS See Fig 7-2 8
HO turn-off delay Toff 180 400 nS See Fig 7-2 8
HO rise time Tr 120 200 nS See Fig 7-2 8
HO fall time Tf 80 100 nS See Fig 7-2 8
Dead time DT 50 100 300 nS See Fig 7-3, no load capacitance CL=0 8
Peak source output current IO+ 1.8 2 A Vo=0V, VIN=VIH, PW≤10uS 8
Peak sink output current IO- 2 2.5 A Vo=12V, VIN=VIL, PW≤10uS 8

CAD (KiCad official)

  • Symbol: EG3113
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: eg3113-etched.step / eg3113-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); eg3113.step / eg3113.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: EG Micro datasheet (12 pp, sha256 70df0bd34bcfab4b, retrieved 2026-11-04, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF