component

EG2133

Public Made by Adom

by adom

EG Micro Gate Drive ICs, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icseg2133factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
eg2133 / README.md
History Download
Ray Publish 0.1.0 74cb6d9 10d ago

EG2133

EG Micro · Gate Drive ICs · TSSOP-20

EG2133 from EG Micro, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN1 input Active-high logic input controlling high-side output HO1 (1 = turn on, 0 = turn off), with input range -0.3 V to VCC+0.3 V and a built-in pull-down resistor.
2 HIN2 input Active-high logic input controlling high-side output HO2 (1 = turn on, 0 = turn off), with input range -0.3 V to VCC+0.3 V and a built-in pull-down resistor.
3 HIN3 input Active-high logic input controlling high-side output HO3 (1 = turn on, 0 = turn off), with input range -0.3 V to VCC+0.3 V and a built-in pull-down resistor.
4 LIN1 input Active-low logic input controlling low-side output LO1 (0 = turn on, 1 = turn off), with input range -0.3 V to 6 V.
5 LIN2 input Active-low logic input controlling low-side output LO2 (0 = turn on, 1 = turn off), with input range -0.3 V to 6 V.
6 LIN3 input Active-low logic input controlling low-side output LO3 (0 = turn on, 1 = turn off), with input range -0.3 V to 6 V.
7 VCC power_in Low-side and logic supply, operating range 4.5 V to 20 V (absolute maximum 25 V).
8 GND power_in Ground reference for the supply and logic.
9 LO1 output Low-side gate drive output for phase 1, swinging -0.3 V to VCC+0.3 V with +1.2 A/-1.4 A drive capability.
10 LO2 output Low-side gate drive output for phase 2, swinging -0.3 V to VCC+0.3 V with +1.2 A/-1.4 A drive capability.
11 LO3 output Low-side gate drive output for phase 3, swinging -0.3 V to VCC+0.3 V with +1.2 A/-1.4 A drive capability.
12 VS1 passive High-side floating ground (switch node) for phase 1, range VB-25 V to VB+0.3 V.
13 HO1 output High-side gate drive output for phase 1, swinging VS-0.3 V to VB+0.3 V.
14 VB1 power_in High-side floating (bootstrap) supply for phase 1, withstanding up to 300 V.
15 VS2 passive High-side floating ground (switch node) for phase 2, range VB-25 V to VB+0.3 V.
16 HO2 output High-side gate drive output for phase 2, swinging VS-0.3 V to VB+0.3 V.
17 VB2 power_in High-side floating (bootstrap) supply for phase 2, withstanding up to 300 V.
18 VS3 passive High-side floating ground (switch node) for phase 3, range VB-25 V to VB+0.3 V.
19 HO3 output High-side gate drive output for phase 3, swinging VS-0.3 V to VB+0.3 V.
20 VB3 power_in High-side floating (bootstrap) supply for phase 3, withstanding up to 300 V.

Key specifications

Parameter Value
Manufacturer EG Micro
Package TSSOP-20
Category Power Management ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Bootstrap high-side supply VB VB1,VB2,VB3 -0.3 300 V 7
Supply VCC VCC -0.3 25 V 7
Low-channel logic input LIN LIN -0.3 6 V 8
Ambient temperature -40 125 ℃ 8
Storage temperature -55 150 ℃ 8
Soldering temperature 300 ℃ T=10S 8
Supply voltage VDD 4.5 12 20 V TA=25℃, Vcc=12V, CL=1nF 8
Quiescent current Icc 300 uA 输入悬空，VCC=12V 8
Input logic high Vin(H) 2.5 V 所有输入控制信号 8
Input logic low Vin(L) -0.3 0 1 V 所有输入控制信号 8
Input high current Iin(H) 15 uA Vin=5V 8
Input low current Iin(L) -15 uA Vin=0V 8
Floating supply leakage current ILK 0.1 1 uA VB1,2,3=VS1,2,3=300V 8
VBS quiescent current IQBS 0.1 10 uA VIN=0 或者 VIN=5V 8
VBS dynamic current IPBS 100 200 uA f=16KHZ 8
Vcc quiescent current IQcc 0.1 10 uA VIN=0 或者 VIN=5V 8
Vcc dynamic current IPcc 300 500 uA f=16KHZ 8
LIN high input bias current ILINH 20 30 uA VLIN=5V 8
LIN low input bias current ILINL 30 40 uA VLIN=0V 8
HIN high input bias current IHINH 20 40 uA VLIN=5V 8
HIN low input bias current IHINL 1 uA VLIN=0V 8
VS static negative voltage VSN -6 V 8
Input pull-down resistance RIN 240 KΩ 9
LO turn-on delay Ton 300 400 nS 见图 7-1 9
LO turn-off delay Toff 100 200 nS 见图 7-1 9
LO rise time Tr 25 200 nS 见图 7-1 9
LO fall time Tf 20 100 nS 见图 7-1 9
High-side output voltage VOH 0.7 1 A IO=100mA 9
Low-side output voltage VOL 0.3 0.45 A IO=100mA 9
Output source current IO+ 1.2 A Vo=0V,VIN=VIH PW≤10uS 9
Output sink current IO- -1.4 A Vo=12V,VIN=VIL PW≤10uS 9
HO turn-on delay Ton 220 400 nS 见图 7-2 9
HO turn-off delay Toff 200 400 nS 见图 7-2 9
HO rise time Tr 25 200 nS 见图 7-2 9
HO fall time Tf 20 100 nS 见图 7-2 9
Dead time DT 50 100 300 nS 见图 7-3，无负载电容 CL=0 9

CAD (KiCad official)

  • Symbol: EG2133
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: eg2133-etched.step / eg2133-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); eg2133.step / eg2133.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: EG Micro datasheet (12 pp, sha256 cb1763c8cf9df8e3, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF