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EG1165S
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EG Micro AC-DC Controllers And Regulators, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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EG1165S
EG Micro · AC-DC Controllers And Regulators · SOP-16
EG1165S from EG Micro, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF5V | power_out | 5V reference output rated for 10 mA drive; a high-frequency ceramic bypass capacitor (1 µF suggested) should be placed close to this pin. |
| 2 | EN | input | Enable input with a 1.2 V comparison threshold (1.15 V to 1.25 V); below 1.2 V the chip enters standby and the 5V output is turned off. |
| 3 | SD | input | Shutdown input: high level turns PWM output off cycle-by-cycle (3 V minimum), low level allows PWM output; absolute maximum -0.3 V to 20 V. |
| 4 | SS | input | Soft-start pin; an external capacitor sets the soft-start time through its voltage rise rate, with an absolute maximum of -0.3 V to 5.5 V. |
| 5 | VSS | power_in | Chip signal (analog) ground for the control circuitry. |
| 6 | CP | input | Oscillator timing capacitor pin setting the switching frequency from 20 Hz to 500 kHz via f = 11.8×10^6 / CP (CP in pF); absolute maximum -0.3 V to 5.5 V. |
| 7 | ERRO | output | Output of the voltage-loop error amplifier; absolute maximum -0.3 V to 5.5 V. |
| 8 | FB | input | Inverting input of the voltage-loop error amplifier with a 1.2 V reference (1.188 V to 1.212 V); absolute maximum -0.3 V to 5.5 V. |
| 9 | SDLIN | input | Low-side MOS current comparator input with a 180 mV trip threshold referenced to COM; absolute maximum -0.3 V to +5 V. |
| 10 | LO | output | Drives the low-side power MOSFET gate; output limited to -0.3 V to VCC+0.3 V with peak source 1.5 A and sink 2 A (pulse width ≤10 µs). |
| 11 | COM | power_in | Power ground for the output driver stage; the low-side current-sense threshold is referenced to this pin. |
| 12 | VCC | power_in | Low-side supply pin with an operating range of 10 V to 20 V and an absolute maximum of -0.3 V to 20 V. |
| 13 | SDHIN | input | High-side MOS current comparator input with a 180 mV trip threshold referenced to VS; limited to VS-0.3 V to VS+5 V. |
| 14 | VS | power_in | High-side floating ground reference; limited to VB-20 V to VB+0.3 V. |
| 15 | VB | power_out | High-side floating bootstrap supply with an operating range of 10 V to 600 V and an absolute maximum of -0.3 V to 600 V. |
| 16 | HO | output | Drives the high-side power MOSFET gate; output limited to VS-0.3 V to VB+0.3 V with peak source 1.5 A and sink 2 A (pulse width ≤10 µs). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | EG Micro |
| Package | SOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VB 高压电源 VB 输入电压 | VB | 10 | 600 | V | 10 | ||
| VCC 低压电源 VCC 输入电压 | VCC | 10 | 20 | V | 10 | ||
| VCC 启动电流 | Istart | 200 | 500 | uA | 10 | ||
| VCC 开启电压 EG1165S | VCC(ON) | 7.5 | 8.5 | 9.3 | V | 10 | |
| VCC 关闭电压 EG1165S | VCC(OFF) | 6.5 | 7.5 | 8.3 | V | 10 | |
| 5V 基准输出 | REF5V | 4.8 | 4.9 | 5 | V | VCC 开启,VCC=12V | 11 |
| 线性调整率 | ΔVREF | 3 | 50 | mV | VCC=10V to 20V | 11 | |
| 负载调整率 | ΔVREF | 5 | 50 | mV | IL=0 to 10mA | 11 | |
| 最大输出电流 | Io | 10 | mA | 11 | |||
| 振荡频率范围 | Fosc | 112 | 118 | 124 | KHz | CT=100pF | 11 |
| 电压抑制比 | Δf/ΔVCC | -5 | 3 | 5 | % | CT=100pF | 11 |
| 温度漂移 | Δf/ΔT | -8 | 5 | 8 | % | 11 | |
| 误差放大器反馈端 | FB | 1.188 | 1.2 | 1.212 | V | 11 | |
| 误差放大器输出电流能力 | Ierro | 15 | 20 | 25 | uA | 11 | |
| 输入偏置电流 | Ib | 0.1 | uA | 11 | |||
| 开环增益 | AVOL | 60 | 75 | dB | 11 | ||
| LO、HO 最大输出占空比 | D(max) | 45 | 47.5 | % | CT=100pF | 11 | |
| EN 使能端比较电压 | EN | 1.15 | 1.2 | 1.25 | V | 11 | |
| SD 逐周关闭 PWM 电压 | SD | 3 | V | 11 | |||
| SDHIN 高端电流比较器 相对 VS 电压 | SDHIN | 180 | mV | 相对 VS 电压 | 11 | ||
| SDLIN 低端电流比较器 相对 COM 电压 | SDLIN | 180 | mV | 相对 COM 电压 | 11 | ||
| 输入前沿消隐 | LEB | 500 | nS | 11 | |||
| 最小死区时间 | DT | 500 | nS | CT=100pF | 11 | ||
| LO,HO 输出拉电流 | Io+ | 1.5 | 2 | A | Vo=0V,VIN=VIH PW≤10uS | 11 | |
| LO,HO 输出灌电流 | Io- | 2 | 2.5 | A | Vo=12V,VIN=VIL PW≤10uS | 11 | |
| VB 自举高端 VB 电源 | VB | -0.3 | 600 | V | 10 | ||
| VCC 低端电源 | VCC | -0.3 | 20 | V | 10 | ||
| SDLIN 低端比较器输入 | SDLIN | -0.3 | 5 | V | 10 | ||
| FB、ERRO、CP、SS、REF5V 低压端口 | FB、ERRO、CP、SS、REF5V | -0.3 | 5.5 | V | 10 | ||
| SD、EN 控制端口 | SD、EN | -0.3 | 20 | V | 10 | ||
| TA 环境温度 | TA | -45 | 125 | ℃ | 10 | ||
| Tstr 储存温度 | Tstr | -65 | 150 | ℃ | 10 | ||
| TL 焊接温度 | TL | 300 | ℃ | T=10S | 10 |
CAD (KiCad official)
- Symbol:
EG1165S - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
eg1165s-etched.step/eg1165s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eg1165s.step/eg1165s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: EG Micro datasheet (14 pp, sha256
7cdf51a535dd2a3d, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# EG1165S
**EG Micro** · AC-DC Controllers And Regulators · SOP-16
EG1165S from EG Micro, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF5V | power_out | 5V reference output rated for 10 mA drive; a high-frequency ceramic bypass capacitor (1 µF suggested) should be placed close to this pin. |
| 2 | EN | input | Enable input with a 1.2 V comparison threshold (1.15 V to 1.25 V); below 1.2 V the chip enters standby and the 5V output is turned off. |
| 3 | SD | input | Shutdown input: high level turns PWM output off cycle-by-cycle (3 V minimum), low level allows PWM output; absolute maximum -0.3 V to 20 V. |
| 4 | SS | input | Soft-start pin; an external capacitor sets the soft-start time through its voltage rise rate, with an absolute maximum of -0.3 V to 5.5 V. |
| 5 | VSS | power_in | Chip signal (analog) ground for the control circuitry. |
| 6 | CP | input | Oscillator timing capacitor pin setting the switching frequency from 20 Hz to 500 kHz via f = 11.8×10^6 / CP (CP in pF); absolute maximum -0.3 V to 5.5 V. |
| 7 | ERRO | output | Output of the voltage-loop error amplifier; absolute maximum -0.3 V to 5.5 V. |
| 8 | FB | input | Inverting input of the voltage-loop error amplifier with a 1.2 V reference (1.188 V to 1.212 V); absolute maximum -0.3 V to 5.5 V. |
| 9 | SDLIN | input | Low-side MOS current comparator input with a 180 mV trip threshold referenced to COM; absolute maximum -0.3 V to +5 V. |
| 10 | LO | output | Drives the low-side power MOSFET gate; output limited to -0.3 V to VCC+0.3 V with peak source 1.5 A and sink 2 A (pulse width ≤10 µs). |
| 11 | COM | power_in | Power ground for the output driver stage; the low-side current-sense threshold is referenced to this pin. |
| 12 | VCC | power_in | Low-side supply pin with an operating range of 10 V to 20 V and an absolute maximum of -0.3 V to 20 V. |
| 13 | SDHIN | input | High-side MOS current comparator input with a 180 mV trip threshold referenced to VS; limited to VS-0.3 V to VS+5 V. |
| 14 | VS | power_in | High-side floating ground reference; limited to VB-20 V to VB+0.3 V. |
| 15 | VB | power_out | High-side floating bootstrap supply with an operating range of 10 V to 600 V and an absolute maximum of -0.3 V to 600 V. |
| 16 | HO | output | Drives the high-side power MOSFET gate; output limited to VS-0.3 V to VB+0.3 V with peak source 1.5 A and sink 2 A (pulse width ≤10 µs). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | EG Micro |
| Package | SOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VB 高压电源 VB 输入电压 | VB | 10 | | 600 | V | | 10 |
| VCC 低压电源 VCC 输入电压 | VCC | 10 | | 20 | V | | 10 |
| VCC 启动电流 | Istart | | 200 | 500 | uA | | 10 |
| VCC 开启电压 EG1165S | VCC(ON) | 7.5 | 8.5 | 9.3 | V | | 10 |
| VCC 关闭电压 EG1165S | VCC(OFF) | 6.5 | 7.5 | 8.3 | V | | 10 |
| 5V 基准输出 | REF5V | 4.8 | 4.9 | 5 | V | VCC 开启,VCC=12V | 11 |
| 线性调整率 | ΔVREF | | 3 | 50 | mV | VCC=10V to 20V | 11 |
| 负载调整率 | ΔVREF | | 5 | 50 | mV | IL=0 to 10mA | 11 |
| 最大输出电流 | Io | | | 10 | mA | | 11 |
| 振荡频率范围 | Fosc | 112 | 118 | 124 | KHz | CT=100pF | 11 |
| 电压抑制比 | Δf/ΔVCC | -5 | 3 | 5 | % | CT=100pF | 11 |
| 温度漂移 | Δf/ΔT | -8 | 5 | 8 | % | | 11 |
| 误差放大器反馈端 | FB | 1.188 | 1.2 | 1.212 | V | | 11 |
| 误差放大器输出电流能力 | Ierro | 15 | 20 | 25 | uA | | 11 |
| 输入偏置电流 | Ib | | | 0.1 | uA | | 11 |
| 开环增益 | AVOL | 60 | 75 | | dB | | 11 |
| LO、HO 最大输出占空比 | D(max) | 45 | 47.5 | | % | CT=100pF | 11 |
| EN 使能端比较电压 | EN | 1.15 | 1.2 | 1.25 | V | | 11 |
| SD 逐周关闭 PWM 电压 | SD | 3 | | | V | | 11 |
| SDHIN 高端电流比较器 相对 VS 电压 | SDHIN | | 180 | | mV | 相对 VS 电压 | 11 |
| SDLIN 低端电流比较器 相对 COM 电压 | SDLIN | | 180 | | mV | 相对 COM 电压 | 11 |
| 输入前沿消隐 | LEB | | 500 | | nS | | 11 |
| 最小死区时间 | DT | | 500 | | nS | CT=100pF | 11 |
| LO,HO 输出拉电流 | Io+ | 1.5 | 2 | | A | Vo=0V,VIN=VIH PW≤10uS | 11 |
| LO,HO 输出灌电流 | Io- | 2 | 2.5 | | A | Vo=12V,VIN=VIL PW≤10uS | 11 |
| VB 自举高端 VB 电源 | VB | -0.3 | | 600 | V | | 10 |
| VCC 低端电源 | VCC | -0.3 | | 20 | V | | 10 |
| SDLIN 低端比较器输入 | SDLIN | -0.3 | | 5 | V | | 10 |
| FB、ERRO、CP、SS、REF5V 低压端口 | FB、ERRO、CP、SS、REF5V | -0.3 | | 5.5 | V | | 10 |
| SD、EN 控制端口 | SD、EN | -0.3 | | 20 | V | | 10 |
| TA 环境温度 | TA | -45 | | 125 | ℃ | | 10 |
| Tstr 储存温度 | Tstr | -65 | | 150 | ℃ | | 10 |
| TL 焊接温度 | TL | | | 300 | ℃ | T=10S | 10 |
## CAD (KiCad official)
- Symbol: `EG1165S`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `eg1165s-etched.step` / `eg1165s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `eg1165s.step` / `eg1165s.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [EG Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836312120762368) (14 pp, sha256 `7cdf51a535dd2a3d`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/eg1165s-datasheet.pdf)