component

EFR32MG21A020F512IM32-B

Public Made by Adom

by adom

SILICON LABS RF Transceiver ICs, QFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentrf & radioefr32mg21a020f512im32-bfactory-2.0.0extractor-text

Verified EFR32MG21A020F512IM32-B

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EFR32MG21A020F512IM32-B · QFN-32-EP(4x4) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 76-page datasheet
  • ✓distributor: lcsc C1558434, digikey EFR32MG21A020F512IM32-B-ND, mouser 634-MG21A020F51232B
  • ✓family: QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-jrcjxd0k/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ efr32mg21a020f512im32-b.kicad_sym✓ efr32mg21a020f512im32-b.kicad_mod✓ efr32mg21a020f512im32-b.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
efr32mg21a020f512im32-b / README.md
History Download
Ray Publish 0.1.0 abe15f1

EFR32MG21A020F512IM32-B

SILICON LABS · RF Transceiver ICs · QFN-32-EP(4x4)

EFR32MG21A020F512IM32-B from SILICON LABS, in a QFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC00 bidirectional General-purpose I/O pin PC00, which also has the alternate function GPIO.EM4WU6 per Table 6.2.
2 PC01 bidirectional General-purpose I/O pin PC01 as listed in the QFN32 pinout table.
3 PC02 bidirectional General-purpose I/O pin PC02 as listed in the QFN32 pinout table.
4 PC03 bidirectional General-purpose I/O pin PC03 as listed in the QFN32 pinout table.
5 PC04 bidirectional General-purpose I/O pin PC04 as listed in the QFN32 pinout table.
6 PC05 bidirectional General-purpose I/O pin PC05, which also has the alternate function GPIO.EM4WU7 per Table 6.2.
7 HFXTAL_I input High frequency crystal oscillator input for the HFXO.
8 HFXTAL_O output High frequency crystal oscillator output for the HFXO.
9 RESETn input Active-low reset pin; its input thresholds are proportional to DVDD per the GPIO note in Section 4.1.9.
10 RFVDD power_in Radio power supply pin.
11 RFVSS power_in Radio ground pin.
12 RF2G4_IO2 bidirectional 2.4 GHz RF input/output pin that connects to the antenna interface and the integrated switch path.
13 RF2G4_IO1 bidirectional 2.4 GHz RF input/output pin that connects to the antenna interface and the integrated switch path.
14 PAVDD power_in Power amplifier (PA) power supply pin.
15 PB01 bidirectional General-purpose I/O pin PB01, which also has the alternate function GPIO.EM4WU3 per Table 6.2.
16 PB00 bidirectional General-purpose I/O pin PB00 as listed in the QFN32 pinout table.
17 PA00 bidirectional General-purpose I/O pin PA00 as listed in the QFN32 pinout table.
18 PA01 bidirectional General-purpose I/O pin PA01, which also has the alternate function GPIO.SWCLK per Table 6.2.
19 PA02 bidirectional General-purpose I/O pin PA02, which also has the alternate function GPIO.SWDIO per Table 6.2.
20 PA03 bidirectional General-purpose I/O pin PA03, which also has the alternate functions GPIO.SWV, GPIO.TDO and GPIO.TRACEDATA0 per Table 6.2.
21 PA04 bidirectional General-purpose I/O pin PA04, which also has the alternate functions GPIO.TDI and GPIO.TRACECLK per Table 6.2.
22 PA05 bidirectional General-purpose I/O pin PA05, which also has the alternate function GPIO.EM4WU0 per Table 6.2.
23 PA06 bidirectional General-purpose I/O pin PA06 as listed in the QFN32 pinout table.
24 DECOUPLE power_out Decouple output for the on-chip voltage regulator; an external decoupling capacitor is required at this pin.
25 DVDD power_in Digital power supply pin.
26 AVDD power_in Analog power supply pin; the ADC main analog supply range is 1.71 V to 3.8 V.
27 IOVDD power_in Digital I/O power supply pin that sets the GPIO input thresholds (0.3IOVDD low, 0.7IOVDD high).
28 PD04 bidirectional General-purpose I/O pin PD04 as listed in the QFN32 pinout table.
29 PD03 bidirectional General-purpose I/O pin PD03 as listed in the QFN32 pinout table.
30 PD02 bidirectional General-purpose I/O pin PD02, which also has the alternate function GPIO.EM4WU9 per Table 6.2.
31 PD01 bidirectional General-purpose I/O pin PD01, which also has the alternate functions LFXO.LFXTAL_I and LFXO.LF_EXTCLK per Table 6.2.
32 PD00 bidirectional General-purpose I/O pin PD00, which also has the alternate function LFXO.LFXTAL_O per Table 6.2.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package QFN-32-EP(4x4)
Category RF & Radio
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature range TSTG -50 150 °C 14
Junction temperature TJMAX 135 °C I grade 14
Voltage on any supply pin VDDMAX -0.3 3.8 V 14
Voltage ramp rate on any supply pin VDDRAMPMAX 1 V / µs 14
Voltage on HFXO pins VHFXOPIN -0.3 1.2 V 14
DC voltage on any GPIO pin VDIGPIN -0.3 V 14
Input RF level on pins RF2G4_IO1 and RF2G4_IO2 PRFMAX2G4 10 dBm 14
Absolute voltage on RF pins RF2G4_IOx VMAX2G4 -0.3 V 14
Total current into VDD power lines IVDDMAX 200 mA Source 14
Total current into VSS ground lines IVSSMAX 200 mA Sink 14
Current per I/O pin IIOMAX 50 mA Sink 14
Current for all I/O pins IIOALLMAX 200 mA Sink 14
Operating ambient temperature range TA -40 125 °C -I temperature grade 15
DVDD supply voltage VDVDD 1.71 3 3.8 V EM0/1 15
AVDD supply voltage VAVDD 1.71 3 3.8 V 15
IOVDDx operating supply voltage VIOVDDx 1.71 3 3.8 V All IOVDD pins 15
PAVDD operating supply voltage VPAVDD 1.71 3 3.8 V 15
RFVDD operating supply voltage VRFVDD 1.71 3 V 15
DECOUPLE output capacitor CDECOUPLE 0.75 1 2.75 µF 15
HCLK and Core frequency fHCLK 80 MHz MODE = WS1, RAMWSEN = 1 15
HCLK and Core frequency fHCLK 50 MHz MODE = WS1, RAMWSEN = 0 15
HCLK and Core frequency fHCLK 39 MHz MODE = WS0, RAMWSEN = 0 15
PCLK frequency fPCLK 50 MHz 15
EM01 Group A clock frequency fEM01GRPACLK 80 MHz 15
HCLK Radio frequency fHCLKRADIO 38 38.4 40 MHz 15
Thermal Resistance Junction to Ambient QFN32 (4x4mm) Package THETAJA_QFN32_4X4 94.3 °C/W 2-Layer PCB, Natural Convection 16
Thermal Resistance Junction to Ambient QFN32 (4x4mm) Package THETAJA_QFN32_4X4 35.4 °C/W 4-Layer PCB, Natural Convection 16
Thermal Resistance Junction to Case QFN32 (4x4mm) Package THETAJC_QFN32_4X4 36.3 °C/W 2-Layer PCB, Natural Convection 16
Thermal Resistance Junction to Case QFN32 (4x4mm) Package THETAJC_QFN32_4X4 23.5 °C/W 4-Layer PCB, Natural Convection 16
Flash erase cycles before failure ECFLASH 10000 cycles TA ≤ 125 °C 37
Flash data retention RETFLASH 10 years TA ≤ 125 °C 37
Program Time tPROG 40.2 44 47.9 uSec one word (32-bits) 37
Program Time average per word tPROG 9.97 10.9 11.9 uSec over 128 words 37
Page Erase Time tPERASE 11.6 12.7 13.9 ms 37
Mass Erase Time tMERASE 11.7 12.8 14.1 ms 37
Page Erase Current IERASE 2.13 mA TA = 25 °C 37
Program Current IWRITE 2.73 mA TA = 25 °C 37
Mass Erase Current IMERASE 2.3 mA TA = 25 °C 37
Flash Supply voltage during write or erase VFLASH 1.71 3.8 V 37
Frequency Accuracy FHFRCO_ACC -3 3 % For all production calibrated frequencies 41

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 70

CAD (KiCad official)

  • Symbol: EFR32MG21A020F512IM32-B
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: efr32mg21a020f512im32-b-etched.step / efr32mg21a020f512im32-b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); efr32mg21a020f512im32-b.step / efr32mg21a020f512im32-b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (76 pp, sha256 cf5d9c7d572ffdb5, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF