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EFR32BG22C224F512IM32-CR

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SILICON LABS RF Transceiver ICs, QFN-32(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentradio frequency chip-antennaefr32bg22c224f512im32-crfactory-2.0.0extractor-text

Verified EFR32BG22C224F512IM32-CR

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier lcsc, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EFR32BG22C224F512IM32-CR · QFN-32(4x4) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 102-page datasheet
  • ✓distributor: lcsc C3606807, digikey 336-EFR32BG22C224F512IM32-CRTR-ND, mouser 634-ER32BG22512IM3CR
  • ✓family: QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ap6tvu2c/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ efr32bg22c224f512im32-cr.kicad_sym✓ efr32bg22c224f512im32-cr.kicad_mod✓ efr32bg22c224f512im32-cr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers efr32bg22c224f512im32-cr: viewers · Ray 1d ago
efr32bg22c224f512im32-cr-etched.glb Publish 0.1.0 · Ray 1d ago
efr32bg22c224f512im32-cr-etched.step efr32bg22c224f512im32-cr: factory component page (tier=lcsc) · Ray 1d ago
efr32bg22c224f512im32-cr-hero.glb efr32bg22c224f512im32-cr: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
efr32bg22c224f512im32-cr-hero.overlay.json Publish 0.1.0 · Ray 1d ago
efr32bg22c224f512im32-cr.glb Publish 0.1.0 · Ray 1d ago
efr32bg22c224f512im32-cr.kicad_mod Publish 0.1.0 · Ray 1d ago
efr32bg22c224f512im32-cr.kicad_sym Publish 0.1.0 · Ray 1d ago
efr32bg22c224f512im32-cr.lbr Publish 0.1.0 · Ray 1d ago
efr32bg22c224f512im32-cr.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier lcsc, 33 pins · Ray 1d ago

EFR32BG22C224F512IM32-CR

SILICON LABS · RF Transceiver ICs · QFN-32(4x4)

EFR32BG22C224F512IM32-CR from SILICON LABS, in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC00 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
2 PC01 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
3 PC02 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
4 PC03 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
5 PC04 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
6 PC05 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
7 HFXTAL_I input High frequency crystal input; typical application circuits use a 38.4 MHz crystal.
8 HFXTAL_O output High frequency crystal output; typical application circuits use a 38.4 MHz crystal.
9 RESETn input Reset pin, internally pulled up to DVDD; RESETn input low time of at least 100 ns ensures pin reset.
10 RFVDD power_in Radio power supply.
11 RFVSS power_in Radio ground.
12 RF2G4_IO bidirectional 2.4 GHz single-ended RF input/output pin connected to the antenna interface.
13 PAVDD power_in Power amplifier (PA) power supply.
14 PB02 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
15 PB01 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
16 PB00 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
17 PA00 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
18 PA01 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
19 PA02 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
20 PA03 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
21 PA04 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
22 PA05 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
23 PA06 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
24 DECOUPLE power_out Decouple output for the on-chip voltage regulator; an external decoupling capacitor is required at this pin.
25 VREGSW passive DCDC regulator switching node.
26 VREGVDD power_in DCDC regulator input supply.
27 VREGVSS power_in DCDC ground.
28 DVDD power_in Digital power supply; RESETn is pulled up to this supply.
29 AVDD power_in Analog power supply.
30 IOVDD power_in I/O power supply; GPIO input thresholds are proportional to this supply.
31 PD01 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
32 PD00 bidirectional General-purpose I/O; alternate functions are listed in the Alternate Function Table (6.4).
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package QFN-32(4x4)
Category Radio Frequency Chip/Antenna
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating ambient temperature range (-I grade) TA -40 125 °C -I temperature grade 19
DVDD supply voltage VDVDD 1.71 3 3.8 V EM0/1 19
AVDD supply voltage VAVDD 1.71 3 3.8 V 19
IOVDDx operating supply voltage (All IOVDD pins) VIOVDDx 1.71 3 3.8 V 19
PAVDD operating supply voltage VPAVDD 1.71 3 3.8 V 19
VREGVDD operating supply voltage VVREGVDD 2.2 3 3.8 V DC-DC in regulation 19
VREGVDD operating supply voltage VVREGVDD 1.8 3 3.8 V DC-DC in bypass 60 mA load 19
VREGVDD operating supply voltage VVREGVDD 1.71 3 3.8 V DC-DC not in use. DVDD externally shorted to VREGVDD 19
RFVDD operating supply voltage VRFVDD 1.71 3 V 19
HCLK and SYSCLK frequency fHCLK 76.8 MHz VSCALE2, MODE = WS1 19
HCLK and SYSCLK frequency fHCLK 40 MHz VSCALE2, MODE = WS0 19
PCLK frequency fPCLK 50 MHz VSCALE2 19
PCLK frequency fPCLK 40 MHz VSCALE1 19
EM01 Group A clock frequency fEM01GRPACLK 76.8 MHz VSCALE2 19
EM01 Group A clock frequency fEM01GRPACLK 40 MHz VSCALE1 19
EM01 Group B clock frequency fEM01GRPBCLK 76.8 MHz VSCALE2 19
EM01 Group B clock frequency fEM01GRPBCLK 40 MHz VSCALE1 19
DECOUPLE output capacitor CDECOUPLE 1 2.75 µF 19
DECOUPLE output capacitor tolerance CDECOUPLE -10 10 % X8L capacitor used for performance characterization 19
Storage temperature range TSTG -50 150 °C 18
Voltage on any supply pin VDDMAX -0.3 3.8 V 18
Junction temperature TJMAX 125 °C -I grade 18
Voltage ramp rate on any supply pin VDDRAMPMAX 1 V / µs 18
Voltage on HFXO pins VHFXOPIN -0.3 1.4 V 18
DC voltage on RESETn pin VRESETn -0.3 3.8 V 18
Input RF level on RF pins RF2G4_IO PRFMAX2G4 10 dBm 18
Total current into VDD power lines IVDDMAX 200 mA Source 18
Total current into VSS ground lines IVSSMAX 200 mA Sink 18
Current per I/O pin IIOMAX 50 mA Sink 18
Input regulation voltage range at VREGVDD pin, DCDC in regulation, ILOAD = 60 mA VVREGVDD 2.2 3 3.8 V DCDC in regulation, ILOAD = 60 mA, EM0/EM1 mode 21
Input voltage range at VREGVDD pin, DCDC in regulation, ILOAD = 5 mA VVREGVDD 1.8 3 3.8 V DCDC in regulation, ILOAD = 5 mA, EM0/EM1 or EM2/EM3 mode 21
Input voltage range at VREGVDD pin, bypass mode VVREGVDD 1.8 3 3.8 V Bypass mode 21
Regulation DC accuracy ACCDC -2.5 3.3 % VVREGVDD ≥ 2.2 V, Steady state in EM0/EM1 mode or EM2/EM3 mode 21
Regulation total accuracy ACCTOT -5 7 % With mode transitions between EM0/EM1 and EM2/EM3 modes 21
Output load current ILOAD 60 mA EM0/EM1 mode, DCDC in regulation 21
Output load current ILOAD 5 mA EM2/EM3 mode, DCDC in regulation 21
Nominal output capacitor CDCDC 4.7 10 µF 4.7 µF ± 10% X7R capacitor used for performance characterization 21
Nominal output capacitor tolerance CDCDC -10 10 % X7R capacitor used for performance characterization 21
Nominal inductor tolerance LDCDC -20 20 % 21
Resistance in bypass mode RBYP 1.75 3 Ω Bypass switch from VREGVDD to DVDD, VVREGVDD = 1.8 V 21
Powertrain PFET switch resistance 0.86 1.5 Ω PFET switch from VREGVDD to VREGSW, VVREGVDD = 1.8 V 21
Supply monitor threshold programming range VCMP_RNG 2 2.3 V Programmable in 0.1 V steps 21
Supply monitor threshold accuracy VCMP_ACC -5 5 % Supply falling edge trip point 21
Flash supply voltage during write or erase VFLASH 1.71 3.8 V 33
Flash erase cycles before failure ECFLASH 10000 cycles TA ≤ 125 °C 33
Flash data retention RETFLASH 10 years TA ≤ 125 °C 33
Program Current IPROG 1.45 mA 33
Page Erase Current IPERASE 1.34 mA Page Erase 33
RF tuning frequency range FRANGE 2400 2483.5 MHz 36
Supported crystal equivalent series resistance (ESR) ESRHFXO_38M4 40 60 Ω 38.4 MHz, CL = 10 pF 49
Frequency accuracy, Normal mode (LFRCO) FLFRCO_ACC -3 3 % Normal mode 53
Frequency accuracy, Precision mode (LFRCO) FLFRCO_ACC -500 500 ppm Precision mode, across operating temperature range 53
FSRCO frequency FFSRCO 17.2 20 21.2 MHz 52
Oscillation Frequency (ULFRCO) FULFRCO 0.944 1 1.095 kHz 53
Nominal inductor LDCDC 2.2 µH 21
Thermal Resistance Junction to Ambient QFN32 (4x4mm) Package THETAJA_QFN32_4X4 35.4 °C/W 4-Layer PCB, Natural Convection 24

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 87

CAD (KiCad official)

  • Symbol: EFR32BG22C224F512IM32-CR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32(4x4) (KiCad packages3D, STEP)
  • 3D model files: efr32bg22c224f512im32-cr-etched.step / efr32bg22c224f512im32-cr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); efr32bg22c224f512im32-cr.step / efr32bg22c224f512im32-cr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (102 pp, sha256 65ee365dac485de7, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF