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EFR32BG21A010F1024IM32-BR
Public Made by Adomby adom
SILICON LABS RF Transceiver ICs, QFN-32-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownEFR32BG21A010F1024IM32-BR
SILICON LABS · RF Transceiver ICs · QFN-32-EP(4x4)
EFR32BG21A010F1024IM32-BR from SILICON LABS, in a QFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC00 | bidirectional | General-purpose I/O on Port C, bit 0. Alternate function: EM4WU6 (EM4 wake-up input 6). |
| 2 | PC01 | bidirectional | General-purpose I/O on Port C, bit 1. |
| 3 | PC02 | bidirectional | General-purpose I/O on Port C, bit 2. |
| 4 | PC03 | bidirectional | General-purpose I/O on Port C, bit 3. |
| 5 | PC04 | bidirectional | General-purpose I/O on Port C, bit 4. |
| 6 | PC05 | bidirectional | General-purpose I/O on Port C, bit 5. Alternate function: EM4WU7 (EM4 wake-up input 7). |
| 7 | HFXTAL_I | input | High Frequency Crystal Oscillator input. Connect one terminal of the HF crystal here. |
| 8 | HFXTAL_O | output | High Frequency Crystal Oscillator output. Connect the other terminal of the HF crystal here. |
| 9 | RESETn | input | Active-low device reset input. Drive low to hold the chip in reset; internal pull-up is present. |
| 10 | RFVDD | power_in | Radio (transceiver) power supply. Nominal 1.8-3.8 V; decouple locally per reference design. |
| 11 | RFVSS | power_in | Radio ground return. Tie to the PCB ground plane. |
| 12 | RF2G4_IO2 | bidirectional | 2.4 GHz RF input/output (differential half). Connect to the matching / balun network for the 2.4 GHz antenna path. |
| 13 | RF2G4_IO1 | bidirectional | 2.4 GHz RF input/output (differential half). Connect to the matching / balun network for the 2.4 GHz antenna path. |
| 14 | PAVDD | power_in | Power Amplifier (PA) supply. Nominal 1.8-3.8 V; sets TX output-power headroom (10 dBm on the -B/-BR OPN). |
| 15 | PB01 | bidirectional | General-purpose I/O on Port B, bit 1. Alternate function: EM4WU3 (EM4 wake-up input 3). |
| 16 | PB00 | bidirectional | General-purpose I/O on Port B, bit 0. |
| 17 | PA00 | bidirectional | General-purpose I/O on Port A, bit 0. |
| 18 | PA01 | bidirectional | General-purpose I/O on Port A, bit 1. Default Serial Wire Debug clock (SWCLK). |
| 19 | PA02 | bidirectional | General-purpose I/O on Port A, bit 2. Default Serial Wire Debug data I/O (SWDIO). |
| 20 | PA03 | bidirectional | General-purpose I/O on Port A, bit 3. Alternate functions: SWV / TDO / TRACEDATA0. |
| 21 | PA04 | bidirectional | General-purpose I/O on Port A, bit 4. Alternate functions: TDI / TRACECLK. |
| 22 | PA05 | bidirectional | General-purpose I/O on Port A, bit 5. Alternate function: EM4WU0 (EM4 wake-up input 0). |
| 23 | PA06 | bidirectional | General-purpose I/O on Port A, bit 6. |
| 24 | DECOUPLE | passive | Decouple output for the on-chip core voltage regulator. An external decoupling capacitor (per reference design) is required from this pin to VSS - do not load with any other supply. |
| 25 | DVDD | power_in | Digital core power supply. Nominal 1.8-3.8 V; decouple locally per reference design. |
| 26 | AVDD | power_in | Analog power supply for on-chip analog blocks (IADC, ACMP, oscillators). Nominal 1.8-3.8 V. |
| 27 | IOVDD | power_in | Digital I/O power supply. Sets the drive/receive level for the GPIO pads; nominal 1.8-3.8 V. |
| 28 | PD04 | bidirectional | General-purpose I/O on Port D, bit 4. |
| 29 | PD03 | bidirectional | General-purpose I/O on Port D, bit 3. |
| 30 | PD02 | bidirectional | General-purpose I/O on Port D, bit 2. Alternate function: EM4WU9 (EM4 wake-up input 9). |
| 31 | PD01 | bidirectional | General-purpose I/O on Port D, bit 1. Alternate functions: LFXO.LFXTAL_I / LFXO.LF_EXTCLK (Low Frequency crystal input or external LF clock input). |
| 32 | PD00 | bidirectional | General-purpose I/O on Port D, bit 0. Alternate function: LFXO.LFXTAL_O (Low Frequency crystal output). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SILICON LABS |
| Package | QFN-32-EP(4x4) |
| Category | Radio Frequency Chip/Antenna |
| Pins | 32 |
Ordering variants
Same part, different packaging or reel option.
EFR32BG21A010F1024IM32-BR
CAD (KiCad official)
- Symbol:
EFR32BG21A010F1024IM32-BR - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: QFN-32-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
efr32bg21a010f1024im32-br-etched.step/efr32bg21a010f1024im32-br-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);efr32bg21a010f1024im32-br.step/efr32bg21a010f1024im32-br.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SILICON LABS datasheet (None pp, sha256
f8bfff6a1733a68d, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).