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EFM8UB20F64G-B-QFN32

Public Made by Adom

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SILICON LABS Pre-ordered MCUs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersefm8ub20f64g-b-qfn32factory-2.0.0extractor-text

Verified EFM8UB20F64G-B-QFN32

by Ray · last 8 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

8 Nov 2026RayPublished by the parts factory: tier lcsc, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: EFM8UB20F64G-B-QFN32 · QFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 57-page datasheet
  • ✓distributor: lcsc C1340455, digikey EFM8UB20F64G-B-QFN32-ND, mouser 634-EFM8UBF64GBQFN32
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1rc3p6x2/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ efm8ub20f64g-b-qfn32.kicad_sym✓ efm8ub20f64g-b-qfn32.kicad_mod✓ efm8ub20f64g-b-qfn32.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers efm8ub20f64g-b-qfn32: viewers · Ray
efm8ub20f64g-b-qfn32-etched.glb Publish 0.1.0 · Ray
efm8ub20f64g-b-qfn32-etched.step efm8ub20f64g-b-qfn32: factory component page (tier=lcsc) · Ray
efm8ub20f64g-b-qfn32-hero.glb efm8ub20f64g-b-qfn32: hero GLB from the etched model (keeps the MPN mark) · Ray
efm8ub20f64g-b-qfn32-hero.overlay.json Publish 0.1.0 · Ray
efm8ub20f64g-b-qfn32.glb Publish 0.1.0 · Ray
efm8ub20f64g-b-qfn32.kicad_mod Publish 0.1.0 · Ray
efm8ub20f64g-b-qfn32.kicad_sym Publish 0.1.0 · Ray
efm8ub20f64g-b-qfn32.lbr Publish 0.1.0 · Ray
efm8ub20f64g-b-qfn32.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier lcsc, 33 pins · Ray

EFM8UB20F64G-B-QFN32

SILICON LABS · Pre-ordered MCUs · QFN-32-EP(5x5)

EFM8UB20F64G-B-QFN32 from SILICON LABS, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P0.1 bidirectional Multifunction I/O with crossbar capability, with INT0.1/INT1.1 external interrupts and ADC0P.18/ADC0N.18 and CMP0N.4 analog functions.
2 P0.0 bidirectional Multifunction I/O with crossbar capability, with INT0.0/INT1.0 external interrupts and ADC0P.17/ADC0N.17 and CMP0P.4 analog functions.
3 GND power_in Ground.
4 D+ bidirectional USB data positive.
5 D- bidirectional USB data negative.
6 VDD power_in Supply power input / 5V regulator output.
7 VREGIN power_in 5V regulator input.
8 VBUS power_in USB VBUS sense input.
9 RSTb / C2CK bidirectional Active-low reset and C2 debug clock.
10 P3.0 / C2D bidirectional Multifunction I/O with crossbar capability shared with C2 debug data, with ADC0P.16/ADC0N.16 analog functions.
11 P2.7 bidirectional Multifunction I/O with crossbar capability, with ADC0P.15/ADC0N.15 analog functions.
12 P2.6 bidirectional Multifunction I/O with crossbar capability, with ADC0P.14/ADC0N.14 analog functions.
13 P2.5 bidirectional Multifunction I/O with crossbar capability, with ADC0P.13/ADC0N.13 and CMP0N.3 analog functions.
14 P2.4 bidirectional Multifunction I/O with crossbar capability, with ADC0P.12/ADC0N.12 and CMP0P.3 analog functions.
15 P2.3 bidirectional Multifunction I/O with crossbar capability, with ADC0P.11/ADC0N.11 and CMP1N.2 analog functions.
16 P2.2 bidirectional Multifunction I/O with crossbar capability, with ADC0P.10/ADC0N.10 and CMP1P.2 analog functions.
17 P2.1 bidirectional Multifunction I/O with crossbar capability, with ADC0P.9/ADC0N.9 and CMP0N.2 analog functions.
18 P2.0 bidirectional Multifunction I/O with crossbar capability, with ADC0P.8/ADC0N.8 and CMP0P.2 analog functions.
19 P1.7 bidirectional Multifunction I/O with crossbar capability, with ADC0P.7/ADC0N.7 and CMP1N.1 analog functions.
20 P1.6 bidirectional Multifunction I/O with crossbar capability, with ADC0P.6/ADC0N.6 and CMP1P.1 analog functions.
21 P1.5 bidirectional Multifunction I/O with crossbar capability, with ADC0P.5/ADC0N.5 and CMP0N.1 analog functions.
22 P1.4 bidirectional Multifunction I/O with crossbar capability, with ADC0P.4/ADC0N.4 and CMP0P.1 analog functions.
23 P1.3 bidirectional Multifunction I/O with crossbar capability, with ADC0P.3/ADC0N.3 and CMP1N.0 analog functions.
24 P1.2 bidirectional Multifunction I/O with crossbar capability, with ADC0P.2/ADC0N.2 and CMP1P.0 analog functions.
25 P1.1 bidirectional Multifunction I/O with crossbar capability, with ADC0P.1/ADC0N.1 and CMP0N.0 analog functions.
26 P1.0 bidirectional Multifunction I/O with crossbar capability, with ADC0P.0/ADC0N.0 and CMP0P.0 analog functions.
27 P0.7 bidirectional Multifunction I/O with crossbar capability, with INT0.7/INT1.7 external interrupts and VREF.
28 P0.6 bidirectional Multifunction I/O with crossbar capability, with CNVSTR and INT0.6/INT1.6 external interrupts.
29 P0.5 bidirectional Multifunction I/O with crossbar capability, with UART0_RX, INT0.5/INT1.5 and ADC0P.20/ADC0N.20 and CMP1N.4 analog functions.
30 P0.4 bidirectional Multifunction I/O with crossbar capability, with UART0_TX, INT0.4/INT1.4 and ADC0P.19/ADC0N.19 and CMP1P.4 analog functions.
31 P0.3 bidirectional Multifunction I/O with crossbar capability, with EXTCLK and INT0.3/INT1.3 external interrupts.
32 P0.2 bidirectional Multifunction I/O with crossbar capability, with INT0.2/INT1.2 external interrupts.
33 GND power_in Center pad ground.

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package QFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Supply Voltage on VDD VDD 2.72 3.3 3.6 V 11
Operating Supply Voltage on VREGIN VREGIN 2.7 5.25 V 11
System Clock Frequency fSYSCLK 0 48 MHz 11
Operating Ambient Temperature TA -40 85 °C 11
Ambient Temperature Under Bias TBIAS -55 125 °C 23
Storage Temperature TSTG -65 150 °C 23
Voltage on VDD VDD -0.3 4.2 V Min is GND-0.3 23
Voltage on VREGIN VREGIN -0.3 5.8 V Min is GND-0.3 23
Voltage on I/O, RSTb, or VBUS pins VIN -0.3 5.8 V VDD > 2.2 V; min is GND-0.3 23
Voltage on I/O, RSTb, or VBUS pins VIN -0.3 V VDD < 2.2 V; min is GND-0.3, max is VDD+3.6 23
Total Current Sunk into Supply Pin IVDD 500 mA 23
Total Current Sourced out of Ground Pin IGND 500 mA 23
Current Sourced or Sunk by any I/O Pin or RSTb IIO -100 100 mA 23
Thermal Resistance QFN32 Packages θJA 28 °C/W 22
Digital Core Supply Current, Normal Mode, full speed IDD 12 14 mA FSYSCLK = 48 MHz 12
Digital Core Supply Current, Normal Mode, full speed IDD 7 8 mA FSYSCLK = 24 MHz 12
Digital Core Supply Current, Idle Mode IDD 6.5 8 mA FSYSCLK = 48 MHz 12
Digital Core Supply Current, Idle Mode IDD 3.5 5 mA FSYSCLK = 24 MHz 12
ADC0 Supply Current IADC 750 1000 μA Operating at 500 ksps, VDD = 3.0 V 12
Voltage Supply Monitor (VMON0) Current IVMON 15 50 μA 12
Oscillator Frequency, High Frequency Oscillator 0 (48 MHz) fHFOSC0 47.3 48 48.7 MHz Full Temperature and Supply Range 14
Oscillator Frequency, Low Frequency Oscillator (80 kHz) fLFOSC 75 80 85 kHz Full Temperature and Supply Range 14
Throughput Rate fS 500 ksps 15
Tracking Time tTRK 300 ns 15
SAR Clock Frequency fSAR 8.33 MHz 15
Conversion Time tCNV 13 Clocks 10-Bit Conversion 15
Voltage Reference Range VREF 1 V Max is VDD 15
Integral Nonlinearity INL 0.5 1 LSB DC Performance, VREF = 2.4 V 15
Differential Nonlinearity (Guaranteed Monotonic) DNL 0.5 1 LSB DC Performance, VREF = 2.4 V 15
Offset Error EOFF -2 0 2 LSB DC Performance, VREF = 2.4 V 15
Slope Error EM -0.2 0.5 % DC Performance, VREF = 2.4 V 15
On-chip Precision Reference Output Voltage VREFP 2.38 2.42 2.46 V T = 25 °C 16
Short-circuit current ISCVREFP 8 mA 16

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components. 43

CAD (KiCad official)

  • Symbol: EFM8UB20F64G-B-QFN32
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: efm8ub20f64g-b-qfn32-etched.step / efm8ub20f64g-b-qfn32-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); efm8ub20f64g-b-qfn32.step / efm8ub20f64g-b-qfn32.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (57 pp, sha256 6022323e8bbca04e, retrieved 2026-11-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF