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EFM8LB12F64E-C-QFN32

Public Made by Adom

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SILICON LABS Pre-ordered MCUs, QFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersefm8lb12f64e-c-qfn32factory-2.0.0extractor-text
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Contents

README

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EFM8LB12F64E-C-QFN32

SILICON LABS · Pre-ordered MCUs · QFN-32-EP(4x4)

EFM8LB12F64E-C-QFN32 from SILICON LABS, in a QFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P0.0 bidirectional Multifunction I/O with crossbar capability, supporting P0MAT.0, INT0.0, INT1.0, CLU inputs and the VREF analog function.
2 VIO power_in I/O supply power input.
3 VDD power_in Supply power input.
4 RSTb / C2CK bidirectional Active-low reset and C2 debug clock.
5 P3.7 / C2D bidirectional Multifunction I/O shared with the C2 debug data signal.
6 P3.4 bidirectional Multifunction I/O.
7 P3.3 bidirectional Multifunction I/O with DAC3 analog function.
8 P3.2 bidirectional Multifunction I/O with DAC2 analog function.
9 P3.1 bidirectional Multifunction I/O with DAC1 analog function.
10 P3.0 bidirectional Multifunction I/O with DAC0 analog function.
11 P2.6 bidirectional Multifunction I/O with ADC0.19 and CMP1P.8/CMP1N.8 analog functions.
12 P2.5 bidirectional Multifunction I/O with CLU3OUT digital function and ADC0.18, CMP1P.7/CMP1N.7 analog functions.
13 P2.4 bidirectional Multifunction I/O with ADC0.17 and CMP1P.6/CMP1N.6 analog functions.
14 P2.3 bidirectional Multifunction I/O with crossbar capability, P2MAT.3, CLU inputs, ADC0.16 and CMP1P.5/CMP1N.5.
15 P2.2 bidirectional Multifunction I/O with crossbar capability, P2MAT.2, CLU2OUT, ADC0.15 and CMP1P.4/CMP1N.4.
16 P2.1 bidirectional Multifunction I/O with crossbar capability, P2MAT.1, I2C0_SCL, ADC0.14 and CMP1P.3/CMP1N.3.
17 P2.0 bidirectional Multifunction I/O with crossbar capability, P2MAT.0, I2C0_SDA and CMP1P.2/CMP1N.2.
18 P1.7 bidirectional Multifunction I/O with crossbar capability, P1MAT.7, ADC0.13 and CMP0P.9/CMP0N.9.
19 P1.6 bidirectional Multifunction I/O with crossbar capability, P1MAT.6, CLU inputs and ADC0.12.
20 P1.5 bidirectional Multifunction I/O with crossbar capability, P1MAT.5, CLU inputs and ADC0.11.
21 P1.4 bidirectional Multifunction I/O with crossbar capability, P1MAT.4, CLU inputs and ADC0.10.
22 P1.3 bidirectional Multifunction I/O with crossbar capability, P1MAT.3, CLU inputs and ADC0.9.
23 P1.2 bidirectional Multifunction I/O with crossbar capability, P1MAT.2, ADC0.8 and CMP0P.8/CMP0N.8.
24 P1.1 bidirectional Multifunction I/O with crossbar capability, P1MAT.1, ADC0.7 and CMP0P.7/CMP0N.7.
25 P1.0 bidirectional Multifunction I/O with crossbar capability, P1MAT.0, CLU1OUT, ADC0.6, CMP0P.6/CMP0N.6 and CMP1P.1/CMP1N.1.
26 P0.7 bidirectional Multifunction I/O with crossbar capability, P0MAT.7, INT0.7, INT1.7, ADC0.5, CMP0P.5/CMP0N.5 and CMP1P.0/CMP1N.0.
27 P0.6 bidirectional Multifunction I/O with crossbar capability, P0MAT.6, CNVSTR, INT0.6, INT1.6, ADC0.4 and CMP0P.4/CMP0N.4.
28 P0.5 bidirectional Multifunction I/O with crossbar capability, UART0_RX, INT0.5, INT1.5, ADC0.3 and CMP0P.3/CMP0N.3.
29 P0.4 bidirectional Multifunction I/O with crossbar capability, UART0_TX, INT0.4, INT1.4, ADC0.2 and CMP0P.2/CMP0N.2.
30 P0.3 bidirectional Multifunction I/O with crossbar capability, EXTCLK, INT0.3, INT1.3 and EXTOSC analog function.
31 P0.2 bidirectional Multifunction I/O with crossbar capability, CLU0OUT, INT0.2, INT1.2, ADC0.1 and CMP0P.1/CMP0N.1.
32 P0.1 bidirectional Multifunction I/O with crossbar capability, INT0.1, INT1.1, ADC0.0, CMP0P.0/CMP0N.0 and AGND.
33 GND power_in Center ground pad (exposed pad).

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package QFN-32-EP(4x4)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Supply Voltage on VDD VDD 2.2 3.6 V 18
Operating Supply Voltage on VIO VIO 2.2 V max is VDD 18
System Clock Frequency fSYSCLK 0 73.5 MHz 18
Operating Ambient Temperature TA -40 105 °C 18
Normal mode supply current IDD 12.9 15 mA FSYSCLK = 72 MHz (HFOSC1) 19
Normal mode supply current IDD 4.2 5 mA FSYSCLK = 24.5 MHz (HFOSC0) 19
Normal mode supply current IDD 625 1050 μA FSYSCLK = 1.53 MHz (HFOSC0) 19
Normal mode supply current IDD 155 575 μA FSYSCLK = 80 kHz 19
Idle mode supply current IDD 9.6 11.1 mA FSYSCLK = 72 MHz (HFOSC1) 19
Idle mode supply current IDD 3.14 3.8 mA FSYSCLK = 24.5 MHz (HFOSC0) 19
Idle mode supply current IDD 520 950 μA FSYSCLK = 1.53 MHz (HFOSC0) 19
Idle mode supply current IDD 135 550 μA FSYSCLK = 80 kHz 19
Suspend mode supply current IDD 125 545 μA LFO Running 19
Suspend mode supply current IDD 120 535 μA LFO Stopped 19
Snooze mode supply current IDD 23 430 μA LFO Running 19
Snooze mode supply current IDD 19 425 μA LFO Stopped 19
Stop mode supply current IDD 120 535 μA 19
Shutdown mode supply current IDD 0.2 2.1 μA 19
High-Frequency Oscillator 0 supply current IHFOSC0 120 135 μA Operating at 24.5 MHz, TA = 25 °C 19
High-Frequency Oscillator 1 supply current IHFOSC1 1285 1340 μA Operating at 72 MHz, TA = 25 °C 19
Low-Frequency Oscillator supply current ILFOSC 3.7 6 μA Operating at 80 kHz, TA = 25 °C 19
ADC throughput rate (high speed) fS 900 ksps 14 Bit Mode 24
ADC throughput rate (high speed) fS 1 Msps 12 Bit Mode 24
ADC throughput rate (high speed) fS 1.125 Msps 10 Bit Mode 24
ADC throughput rate (low power) fS 320 ksps 14 Bit Mode 24
ADC throughput rate (low power) fS 340 ksps 12 Bit Mode 24
ADC throughput rate (low power) fS 360 ksps 10 Bit Mode 24
ADC tracking time tTRK 217.81 ns High Speed Mode 24
ADC tracking time tTRK 450 ns Low Power Mode 24
ADC power-on time tPWR 1.2 μs 24
SAR clock frequency fSAR 18.36 MHz High Speed Mode 24
SAR clock frequency fSAR 12.25 MHz Low Power Mode 24
ADC voltage reference range VREF 1 V max is VIO 24
ADC integral nonlinearity INL -3.54 8.54 LSB 14 Bit Mode (typ -1.2 / +5) 25
ADC integral nonlinearity INL -1.9 1.9 LSB 12 Bit Mode (typ -0.35 / +1) 25
ADC integral nonlinearity INL -0.6 0.2 0.6 LSB 10 Bit Mode (typ ±0.2) 25
ADC differential nonlinearity DNL -1 1 2.54 LSB 14 Bit Mode (typ ±1) 25
ADC differential nonlinearity DNL -0.9 0.3 0.9 LSB 12 Bit Mode (typ ±0.3) 25
ADC differential nonlinearity DNL -0.5 0.2 0.5 LSB 10 Bit Mode (typ ±0.2) 25
ADC offset error EOFF -8 -2.5 8 LSB 14 Bit Mode 25
ADC offset error EOFF -2 0 2 LSB 12 Bit Mode 25
ADC offset error EOFF -1 0 1 LSB 10 Bit Mode 25
ADC slope error EM -2.6 2.6 LSB 12 Bit Mode 25
ADC slope error EM -1.1 1.1 LSB 10 Bit Mode 25
ADC signal-to-noise SNR 66 72 dB 14 Bit Mode, 10 kHz sine, 1 dB below full scale, max throughput, using AGND pin 25
ADC signal-to-noise SNR 64 68 dB 12 Bit Mode 25
ADC signal-to-noise SNR 59 61 dB 10 Bit Mode 25
ADC signal-to-noise plus distortion SNDR 66 72 dB 14 Bit Mode 25
ADC signal-to-noise plus distortion SNDR 64 68 dB 12 Bit Mode 25
ADC signal-to-noise plus distortion SNDR 59 61 dB 10 Bit Mode 25
Internal fast settling reference output voltage VREFFS 1.62 1.65 1.68 V Full temperature and supply range 27
Precision reference output voltage VREFP 1.195 1.2 1.205 V 1.2 V Output, VDD = 3.3 V, T = 25 °C 27
Precision reference output voltage VREFP 1.18 1.2 1.22 V 1.2 V Output 27
Precision reference output voltage VREFP 2.39 2.4 2.41 V 2.4 V Output, VDD = 3.3 V, T = 25 °C 27
Precision reference output voltage VREFP 2.36 2.4 2.44 V 2.4 V Output 27
Precision reference valid supply range VDD 2.2 3.6 V 1.2 V Output 27
Precision reference valid supply range VDD 2.7 3.6 V 2.4 V Output 27
Precision reference load capacitor CVREFP 0.1 µF Load = 0 to 200 µA to GND 27
Precision reference short-circuit current ISCVREFP 8 mA 27
Temp sensor error with factory-calibrated offset ETOT -3.2 4.2 °C T = -40 °C to 105 °C 28
1.8 V LDO output voltage VOUT_1.8V 1.79 1.84 1.88 V 28
Thermal resistance junction to ambient θJA 26 °C/W QFN32 Packages 35
Thermal resistance junction to case θJC 20 °C/W QFN32 Packages 35
Ambient Temperature Under Bias TBIAS -55 125 °C 36
Storage Temperature TSTG -65 150 °C 36
Voltage on VDD VDD -0.3 4.2 V GND-0.3 to 4.2 36

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components. 60

CAD (KiCad official)

  • Symbol: EFM8LB12F64E-C-QFN32
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: efm8lb12f64e-c-qfn32-etched.step / efm8lb12f64e-c-qfn32-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); efm8lb12f64e-c-qfn32.step / efm8lb12f64e-c-qfn32.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (77 pp, sha256 4bb882f3cda45564, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF