# EFM8BB10F8G-A-QSOP24R

**SILICON LABS** · Microcontroller Units (MCUs/MPUs/SOCs) · QSOP-24-150mil

EFM8BB10F8G-A-QSOP24R from SILICON LABS, in a QSOP-24-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N/C | unconnected | No connection; this pin is not connected internally. |
| 2 | P0.2 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.2, INT0.2, INT1.2, ADC0.2, CMP0P.2 and CMP0N.2. |
| 3 | P0.1 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.1, INT0.1, INT1.1, ADC0.1, CMP0P.1, CMP0N.1 and AGND. |
| 4 | P0.0 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.0, INT0.0, INT1.0, ADC0.0, CMP0P.0, CMP0N.0 and VREF. |
| 5 | GND | power_in | Ground reference for the device. |
| 6 | VDD | power_in | Supply power input; the device operates from a single 2.2 to 3.6 V supply. |
| 7 | RSTb / C2CK | input | Active-low reset input and C2 debug clock. |
| 8 | P2.0 / C2D | bidirectional | Multifunction I/O shared with the C2 debug data line (C2D). |
| 9 | P1.7 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.7, ADC0.15, CMP1P.7 and CMP1N.7. |
| 10 | P1.6 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.6, ADC0.14, CMP1P.6 and CMP1N.6. |
| 11 | P1.5 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.5, ADC0.13, CMP1P.5 and CMP1N.5. |
| 12 | P2.1 | bidirectional | Multifunction I/O, 5 V tolerant under bias; no crossbar capability or additional functions are listed for this pin. |
| 13 | N/C | unconnected | No connection; this pin is not connected internally. |
| 14 | P1.4 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.4, ADC0.12, CMP1P.4 and CMP1N.4. |
| 15 | P1.3 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.3, ADC0.11, CMP1P.3 and CMP1N.3. |
| 16 | P1.2 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.2, ADC0.10, CMP1P.2 and CMP1N.2. |
| 17 | P1.1 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.1, ADC0.9, CMP1P.1 and CMP1N.1. |
| 18 | P1.0 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P1MAT.0, ADC0.8, CMP1P.0 and CMP1N.0. |
| 19 | P0.7 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.7, INT0.7, INT1.7, ADC0.7, CMP0P.7 and CMP0N.7. |
| 20 | P0.6 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.6, CNVSTR, INT0.6, INT1.6, ADC0.6, CMP0P.6 and CMP0N.6. |
| 21 | P0.5 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.5, INT0.5, INT1.5, ADC0.5, CMP0P.5 and CMP0N.5. |
| 22 | P0.4 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.4, INT0.4, INT1.4, ADC0.4, CMP0P.4 and CMP0N.4. |
| 23 | P0.3 | bidirectional | Multifunction I/O with crossbar capability, 5 V tolerant under bias; alternate functions include P0MAT.3, EXTCLK, INT0.3, INT1.3, ADC0.3, CMP0P.3 and CMP0N.3. |
| 24 | N/C | unconnected | No connection; this pin is not connected internally. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | SILICON LABS |
| Package | QSOP-24-150mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 24 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC |  | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. | 45 |

## CAD (KiCad official)

- Symbol: `EFM8BB10F8G-A-QSOP24R`
- Footprint: `Package_SO:QSOP-24_3.9x8.7mm_P0.635mm`
- 3D model: QSOP-24-150mil (KiCad packages3D, STEP)
- 3D model files: `efm8bb10f8g-a-qsop24r-etched.step` / `efm8bb10f8g-a-qsop24r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `efm8bb10f8g-a-qsop24r.step` / `efm8bb10f8g-a-qsop24r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [SILICON LABS datasheet](docs/efm8bb10f8g-a-qsop24r-datasheet.pdf) (57 pp, sha256 `1da0fc0d823d42c4`, retrieved 2026-11-02, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/efm8bb10f8g-a-qsop24r-datasheet.pdf)