EF2M45LG48B

{
  "schema_version": 1,
  "type": "component",
  "slug": "ef2m45lg48b",
  "title": "EF2M45LG48B",
  "brief": "Anlogic Programmable Logic Device (CPLDs/FPGAs), LQFP-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "embedded processors & controllers",
    "ef2m45lg48b",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "EF2M45LG48B",
    "manufacturer": "Anlogic",
    "package": "LQFP-48-EP(7x7)",
    "pin_count": 49,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Programmable Logic Device (CPLDs/FPGAs)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603176760037027840",
    "parts": {
      "symbol": "ef2m45lg48b.kicad_sym",
      "footprint": "ef2m45lg48b.kicad_mod",
      "model_3d": "ef2m45lg48b-etched.glb",
      "model_3d_plain": "ef2m45lg48b.glb",
      "model_3d_step": "ef2m45lg48b-etched.step",
      "model_3d_step_plain": "ef2m45lg48b.step",
      "lbr": "ef2m45lg48b.lbr"
    },
    "distributor_links": {
      "lcsc": "C5360148"
    },
    "pins": [
      {
        "number": "1",
        "name": "VCCAUX",
        "type": "power_in",
        "description": "Auxiliary power supply, nominal 2.5V with ±5% tolerance."
      },
      {
        "number": "2",
        "name": "ADC_VDDA",
        "type": "power_in",
        "description": "ADC analog power supply at 3.3V; minimum 2.5V required for on-chip configuration."
      },
      {
        "number": "3",
        "name": "ADC0_CH0,IO_L_0",
        "type": "bidirectional",
        "description": "Analog-to-digital converter channel 0 input or general-purpose I/O with IOBE buffer in Bank 0."
      },
      {
        "number": "4",
        "name": "PROGRAMN,IO_L1N_0",
        "type": "bidirectional",
        "description": "Active-low asynchronous reset and configuration trigger input with internal pull-up to VCCIO."
      },
      {
        "number": "5",
        "name": "JTAGEN,IO_L1P_0",
        "type": "bidirectional",
        "description": "JTAG enable input (1=JTAG active, 0=JTAG pins become user I/O) with internal pull-up."
      },
      {
        "number": "6",
        "name": "ADC0_CH1,GCLKIOL_1,LVDSRX_0N,IO_L2N_0",
        "type": "bidirectional",
        "description": "ADC channel 1 input, global clock input, LVDS receiver negative differential pair, or Bank 0 user I/O."
      },
      {
        "number": "7",
        "name": "ADC0_CH2,GCLKIOL_0,LVDSRX_0P,IO_L2P_0",
        "type": "bidirectional",
        "description": "ADC channel 2 input, global clock input, LVDS receiver positive differential pair, or Bank 0 user I/O."
      },
      {
        "number": "8",
        "name": "VCCIO_0",
        "type": "power_in",
        "description": "User I/O Bank 0 power supply operating at 1.2V to 3.3V with peak-to-peak ripple <100mV."
      },
      {
        "number": "9",
        "name": "ADC0_CH3,GCLKIOL_3,LVDSTX_0N,IO_L3N_0",
        "type": "bidirectional",
        "description": "ADC channel 3 input, global clock input, LVDS transmitter negative differential pair, or Bank 0 user I/O."
      },
      {
        "number": "10",
        "name": "ADC0_CH4,GCLKIOL_2,LVDSTX_0P,IO_L3P_0",
        "type": "bidirectional",
        "description": "ADC channel 4 input, global clock input, LVDS transmitter positive differential pair, or Bank 0 user I/O."
      },
      {
        "number": "11",
        "name": "TMS,IO_L4N_0",
        "type": "bidirectional",
        "description": "JTAG test mode select input latched on TCK rising edge or Bank 0 user I/O with internal pull-up."
      },
      {
        "number": "12",
        "name": "TCK,IO_L4P_0",
        "type": "bidirectional",
        "description": "JTAG test clock with minimum 100ns period or Bank 0 user I/O with internal pull-up."
      },
      {
        "number": "13",
        "name": "TDI,IO_L5N_0",
        "type": "bidirectional",
        "description": "JTAG test data input latched on TCK rising edge or Bank 0 user I/O with internal pull-up."
      },
      {
        "number": "14",
        "name": "TDO,IO_L5P_0",
        "type": "bidirectional",
        "description": "JTAG test data output updated on TCK rising edge or Bank 0 user I/O."
      },
      {
        "number": "15",
        "name": "D0,IO_BE1P_1",
        "type": "bidirectional",
        "description": "Configuration data bit 0 during slave mode programming or Bank 1 user I/O after configuration."
      },
      {
        "number": "16",
        "name": "D1,IO_BE1N_1",
        "type": "bidirectional",
        "description": "Configuration data bit 1 during programming or Bank 1 user I/O after configuration."
      },
      {
        "number": "17",
        "name": "VCCIO_1",
        "type": "power_in",
        "description": "User I/O Bank 1 power supply, minimum 2.5V for Flash programming with peak-to-peak ripple <100mV."
      },
      {
        "number": "18",
        "name": "D2,IO_BE2P_1",
        "type": "bidirectional",
        "description": "Configuration data bit 2 during programming or Bank 1 user I/O after configuration."
      },
      {
        "number": "19",
        "name": "D3,IO_BE2N_1",
        "type": "bidirectional",
        "description": "Configuration data bit 3 during programming or Bank 1 user I/O after configuration."
      },
      {
        "number": "20",
        "name": "VCCAUX",
        "type": "power_in",
        "description": "Auxiliary power supply, nominal 2.5V with ±5% tolerance for analog circuits."
      },
      {
        "number": "21",
        "name": "D4,GCLKIOB_4,IO_BE3P_1",
        "type": "bidirectional",
        "description": "Configuration data bit 4, global clock input buffer, or Bank 1 user I/O after configuration."
      },
      {
        "number": "22",
        "name": "D5,GCLKIOB_5,IO_BE3N_1",
        "type": "bidirectional",
        "description": "Configuration data bit 5, global clock input buffer, or Bank 1 user I/O after configuration."
      },
      {
        "number": "23",
        "name": "VCCIO_1",
        "type": "power_in",
        "description": "User I/O Bank 1 power supply, minimum 2.5V for Flash programming with peak-to-peak ripple <100mV."
      },
      {
        "number": "24",
        "name": "D6,IO_BE4P_1",
        "type": "bidirectional",
        "description": "Configuration data bit 6 during programming or Bank 1 user I/O after configuration."
      },
      {
        "number": "25",
        "name": "D7,IO_BE4N_1",
        "type": "bidirectional",
        "description": "Configuration data bit 7 during programming or Bank 1 user I/O after configuration."
      },
      {
        "number": "26",
        "name": "IO_R1P_2",
        "type": "bidirectional",
        "description": "Bank 2 user I/O with IOBE buffer, differential pair positive half for LVDS or single-ended operation."
      },
      {
        "number": "27",
        "name": "IO_R1N_2",
        "type": "bidirectional",
        "description": "Bank 2 user I/O with IOBE buffer, differential pair negative half for LVDS or single-ended operation."
      },
      {
        "number": "28",
        "name": "IO_R1_2",
        "type": "bidirectional",
        "description": "Bank 2 user I/O with IOBE buffer for single-ended or differential operation."
      },
      {
        "number": "29",
        "name": "VCCIO_2",
        "type": "power_in",
        "description": "User I/O Bank 2 power supply operating at 1.2V to 3.3V, minimum 2.5V when LVDS is used."
      },
      {
        "number": "30",
        "name": "SCLK,IO_R2_2",
        "type": "bidirectional",
        "description": "Configuration serial clock input (24MHz maximum) during programming or Bank 2 user I/O."
      },
      {
        "number": "31",
        "name": "XTALI",
        "type": "input",
        "description": "Crystal oscillator input for on-chip ring oscillator, high impedance AC-coupled or direct crystal connection."
      },
      {
        "number": "32",
        "name": "XTALO",
        "type": "output",
        "description": "Crystal oscillator output at 290MHz nominal (±30% tolerance) from on-chip ring oscillator."
      },
      {
        "number": "33",
        "name": "VCCAUX",
        "type": "power_in",
        "description": "Auxiliary power supply, nominal 2.5V with ±5% tolerance for analog circuits."
      },
      {
        "number": "34",
        "name": "GPIO4,IO_TE1N_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 4 with IOBB buffer, configuration data bit 4 negative differential half."
      },
      {
        "number": "35",
        "name": "VBAT",
        "type": "power_in",
        "description": "Battery backup power supply for on-chip ring oscillator to maintain operation during system power loss."
      },
      {
        "number": "36",
        "name": "GPIO3,IO_TE1P_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 3 with IOBB buffer, configuration data bit 4 positive differential half."
      },
      {
        "number": "37",
        "name": "GPIO13,IO_TE2N_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 13 with IOBB buffer, configuration data bit 5 negative differential half."
      },
      {
        "number": "38",
        "name": "GPIO12,IO_TE2P_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 12 with IOBB buffer, configuration data bit 5 positive differential half."
      },
      {
        "number": "39",
        "name": "GPIO11,IO_TE3N_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 11 with IOBB buffer, configuration data bit 6 negative differential half."
      },
      {
        "number": "40",
        "name": "GPIO10,IO_TE3P_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 10 with IOBB buffer, configuration data bit 6 positive differential half."
      },
      {
        "number": "41",
        "name": "GPIO9,DPCLKIO_7,ADC1_CH3,IO_TE4N_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 9, digital clock I/O, ADC channel 3 input, or configuration differential pair."
      },
      {
        "number": "42",
        "name": "GPIO8,USRCLK,ADC1_CH2,IO_TE4P_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 8, user system clock input, ADC channel 2 input, or configuration differential pair."
      },
      {
        "number": "43",
        "name": "GPIO7,ADC1_CH1,IO_T1_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 7 or ADC channel 1 input with shared IOBB buffer."
      },
      {
        "number": "44",
        "name": "GPIO6,DPCLKIO_8,ADC1_CH0,IO_T2_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 6, digital clock I/O, or ADC channel 0 input with IOBB buffer."
      },
      {
        "number": "45",
        "name": "GPIO5,ADC0_VREF,IO_T3_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 5 or ADC0 reference voltage input operating at 0.5V to 1.0×VDDA."
      },
      {
        "number": "46",
        "name": "GPIO0,ADC1_CH4,IO_TE5P_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 0, ADC channel 4 input, or configuration data bit 7 positive differential half."
      },
      {
        "number": "47",
        "name": "GPIO1,ADC1_VREF,IO_TE5N_3",
        "type": "bidirectional",
        "description": "Bank 3 general-purpose I/O GPIO 1, ADC1 reference voltage input (0.5V to 1.0×VDDA), or configuration data bit 7 negative half."
      },
      {
        "number": "48",
        "name": "VCCIO_3",
        "type": "power_in",
        "description": "User I/O Bank 3 power supply operating at 1.2V to 3.3V, minimum 2.5V for Flash programming."
      },
      {
        "number": "49",
        "name": "GND_EPAD",
        "type": "power_in",
        "description": "Power ground connection for exposed pad on package bottom surface, must connect to main ground plane."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 121,
        "cost_usd": 1.1579,
        "at": "2026-09-17T17:20:14"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603176760037027840",
        "pages": 121,
        "sha256": "e95db5f86a1d297b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ef2m45lg48b.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.32,
          9.32,
          1.6
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "f960910b71d80cee36ddda3bc3d76fc6db6e160cef6b65cca7a6d6ec3727584e",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ef2m45lg48b-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.32,
          9.32,
          1.6
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "8c7055e4508ff7a7284bd5e461630db70b65f454f9280f2654b7ddb03382a863",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Anlogic",
      "Package": "LQFP-48-EP(7x7)",
      "Category": "Embedded Processors & Controllers",
      "Pins": "49"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ef2m45lg48b"
  ],
  "discovery_pitch": "EF2M45LG48B (Anlogic) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ef2m45lg48b.kicad_sym",
    "ef2m45lg48b.kicad_mod",
    "ef2m45lg48b.glb",
    "ef2m45lg48b.step",
    "ef2m45lg48b.lbr",
    "docs/hero.png",
    "docs/ef2m45lg48b-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T20:15:30.370Z"
}