component
EA8273T7R
Public Made by Adomby adom
Everanalog IC design DC-DC Converters, SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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EA8273T7R
Everanalog IC design · DC-DC Converters · SOT-563
EA8273T7R from Everanalog IC design, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PWR | power_in | Power input pin for the regulator, operating from 4.5V to 16V with an absolute maximum of -0.3V to +17V; two 10uF MLCC capacitors are recommended between PWR and GND. |
| 2 | SWITCH | output | Internal MOSFET switching output that must be connected through a low-pass filter to obtain a stable DC output; the absolute maximum SWITCH pin voltage is -1V to +17.5V. |
| 3 | GND | power_in | Ground pin. |
| 4 | BOOT | power_in | Power input for the internal high-side N-MOSFET gate driver; connect a 33nF ceramic capacitor from BOOT to SWITCH, with BOOT voltage limited to VSWITCH-0.3V to VSWITCH+5V. |
| 5 | RUN | input | On/off control input: above 1.2V (typ.) enables the regulator and below 0.4V shuts it down; the absolute maximum rating is -0.3V to +6.3V, and it may be tied to PWR through a 150kΩ resistor for automatic startup but must not be shorted directly to PWR. |
| 6 | FBK | input | Feedback input that connects through a resistor divider between the output and GND to set the output voltage, with a reference of 0.807V typ. (0.791V to 0.823V) and an absolute maximum of -0.3V to +6.3V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Everanalog IC design |
| Package | SOT-563 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VPWR | 4.5 | 16 | V | 4 | ||
| Reference Voltage | VREF | 0.791 | 0.807 | 0.823 | V | 4.5V ≤ VPWR ≤ 16V | 4 |
| Switching Frequency | FSW | 400 | 600 | 800 | KHz | 4 | |
| RUN Pin Input High Voltage | VRUN-H | 1.1 | 1.2 | 1.3 | V | 4 | |
| Shutdown Supply Current | ISD | 3.6 | 10 | uA | VRUN = 0V | 4 | |
| Quiescent Current | IQ | 350 | 600 | uA | VRUN = 2V, VFBK = 1V | 4 | |
| High Side MOSFET Leakage Current | ILEAK-HM | 1 | 10 | uA | VRUN = 0V, VSWITCH = 0V | 4 | |
| Input Voltage (VPWR) | VPWR | 4.5 | 16 | V | 3 | ||
| RUN Pin Input Voltage | VRUN | -0.3 | 16 | V | 3 | ||
| Output Voltage | VOUT | 0.6 | 9 | V | 3 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 3 | ||
| Input Voltage (VPWR) | VPWR | -0.3 | 17 | V | 3 | ||
| RUN Pin Input Voltage | VRUN | -0.3 | 6.3 | V | 3 | ||
| SWITCH Pin Voltage | VSWITCH | -1 | 17.5 | V | 3 | ||
| FBK Pin Voltage | VFBK | -0.3 | 6.3 | V | 3 | ||
| Ambient Temperature operating Range | TA | -40 | 85 | °C | 3 | ||
| Maximum Junction Temperature | TJmax | 150 | °C | 3 | |||
| Lead Temperature (Soldering) | 260 | °C | 10 sec | 3 | |||
| Storage Temperature Range | TS | -65 | 150 | °C | 3 | ||
| SOT-563 Thermal Resistance (θJC) | θJC | 60 | °C/W | 3 | |||
| SOT-563 Thermal Resistance (θJA) | θJA | 130 | °C/W | 3 | |||
| SOT-563 Power Dissipation (PDmax) | PDmax | 1 | W | TA=25°C | 3 |
CAD (KiCad official)
- Symbol:
EA8273T7R - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files:
ea8273t7r-etched.step/ea8273t7r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ea8273t7r.step/ea8273t7r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Everanalog IC design datasheet (9 pp, sha256
a3f5737101e50fe4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# EA8273T7R
**Everanalog IC design** · DC-DC Converters · SOT-563
EA8273T7R from Everanalog IC design, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PWR | power_in | Power input pin for the regulator, operating from 4.5V to 16V with an absolute maximum of -0.3V to +17V; two 10uF MLCC capacitors are recommended between PWR and GND. |
| 2 | SWITCH | output | Internal MOSFET switching output that must be connected through a low-pass filter to obtain a stable DC output; the absolute maximum SWITCH pin voltage is -1V to +17.5V. |
| 3 | GND | power_in | Ground pin. |
| 4 | BOOT | power_in | Power input for the internal high-side N-MOSFET gate driver; connect a 33nF ceramic capacitor from BOOT to SWITCH, with BOOT voltage limited to VSWITCH-0.3V to VSWITCH+5V. |
| 5 | RUN | input | On/off control input: above 1.2V (typ.) enables the regulator and below 0.4V shuts it down; the absolute maximum rating is -0.3V to +6.3V, and it may be tied to PWR through a 150kΩ resistor for automatic startup but must not be shorted directly to PWR. |
| 6 | FBK | input | Feedback input that connects through a resistor divider between the output and GND to set the output voltage, with a reference of 0.807V typ. (0.791V to 0.823V) and an absolute maximum of -0.3V to +6.3V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Everanalog IC design |
| Package | SOT-563 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VPWR | 4.5 | | 16 | V | | 4 |
| Reference Voltage | VREF | 0.791 | 0.807 | 0.823 | V | 4.5V ≤ VPWR ≤ 16V | 4 |
| Switching Frequency | FSW | 400 | 600 | 800 | KHz | | 4 |
| RUN Pin Input High Voltage | VRUN-H | 1.1 | 1.2 | 1.3 | V | | 4 |
| Shutdown Supply Current | ISD | | 3.6 | 10 | uA | VRUN = 0V | 4 |
| Quiescent Current | IQ | | 350 | 600 | uA | VRUN = 2V, VFBK = 1V | 4 |
| High Side MOSFET Leakage Current | ILEAK-HM | | 1 | 10 | uA | VRUN = 0V, VSWITCH = 0V | 4 |
| Input Voltage (VPWR) | VPWR | 4.5 | | 16 | V | | 3 |
| RUN Pin Input Voltage | VRUN | -0.3 | | 16 | V | | 3 |
| Output Voltage | VOUT | 0.6 | | 9 | V | | 3 |
| Junction Temperature Range | TJ | -40 | | 125 | °C | | 3 |
| Input Voltage (VPWR) | VPWR | -0.3 | | 17 | V | | 3 |
| RUN Pin Input Voltage | VRUN | -0.3 | | 6.3 | V | | 3 |
| SWITCH Pin Voltage | VSWITCH | -1 | | 17.5 | V | | 3 |
| FBK Pin Voltage | VFBK | -0.3 | | 6.3 | V | | 3 |
| Ambient Temperature operating Range | TA | -40 | | 85 | °C | | 3 |
| Maximum Junction Temperature | TJmax | | | 150 | °C | | 3 |
| Lead Temperature (Soldering) | | | | 260 | °C | 10 sec | 3 |
| Storage Temperature Range | TS | -65 | | 150 | °C | | 3 |
| SOT-563 Thermal Resistance (θJC) | θJC | | 60 | | °C/W | | 3 |
| SOT-563 Thermal Resistance (θJA) | θJA | | 130 | | °C/W | | 3 |
| SOT-563 Power Dissipation (PDmax) | PDmax | | 1 | | W | TA=25°C | 3 |
## CAD (KiCad official)
- Symbol: `EA8273T7R`
- Footprint: `Package_TO_SOT_SMD:SOT-563`
- 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files: `ea8273t7r-etched.step` / `ea8273t7r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ea8273t7r.step` / `ea8273t7r.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Everanalog IC design datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590454678262878208) (9 pp, sha256 `a3f5737101e50fe4`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ea8273t7r-datasheet.pdf)