component
EA8253P8R
Public Made by Adomby adom
Everanalog IC design DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownEA8253P8R
Everanalog IC design · DC-DC Converters · SOP-8-EP
EA8253P8R from Everanalog IC design, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | power_in | Power input of the internal high side N-MOSFET gate driver; connect a 33nF ceramic capacitor from BOOT to SWITCH. |
| 2 | PWR | power_in | Power input pin of the EA8253 (4.6V to 23V operating); use two 10uF MLCC capacitors between PWR and GND. |
| 3 | SWITCH | output | Internal MOSFET switching output; connect to a low pass filter (inductor and output capacitor) to obtain a stable DC output voltage. |
| 4 | GND | power_in | Ground pin. |
| 5 | FBK | input | Feedback input; connect to GND and VOUT through a voltage divider to set the output voltage (reference 0.766V). |
| 6 | NC | unconnected | Not connected. |
| 7 | RUN | input | On/off control input: above 2V enables, below 0.4V shuts down; connect to PWR via a 150KΩ pull-up resistor for automatic startup. |
| 8 | SST | passive | Soft-start input; connect a ceramic capacitor between SST and GND to set the soft-start time. |
| 9 | EP | passive | Exposed pad; solder well to the GND plane of the PCB for cooling. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Everanalog IC design |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VPWR | 4.6 | 23 | V | VPWR=12V, TA=25°C | 4 | |
| Shutdown Supply Current | ISD | 1 | 8 | uA | VRUN = 0V | 4 | |
| UVLO Threshold | VUVLO | 3.8 | 4.2 | 4.5 | V | VPWR Rising | 4 |
| Reference Voltage | VREF | 0.75 | 0.766 | 0.782 | V | 4.6V ≤ VPWR ≤ 20V | 4 |
| Switching Frequency | FSW | 450 | 600 | 750 | KHz | 4 | |
| High Side MOSFET Current Limit | ILIM-HM | 4.5 | 5 | A | 4 | ||
| High Side MOSFET Leakage Current | ILEAK-HM | 1 | 10 | uA | VRUN = 0V, VSWITCH = 0V | 4 | |
| RUN Pin Input Low Voltage | VRUN-L | 0.4 | V | 4 | |||
| RUN Pin Input High Voltage | VRUN-H | 2 | V | 4 | |||
| Maximum Duty Cycle | DMAX | 88 | % | VFBK = 0.6V | 4 | ||
| Quiescent Current | IQ | 1.9 | mA | VRUN = 2V, VFBK = 105% VREF, ILOAD = 0A | 4 | ||
| UVLO Hysteresis | VUV-HYST | 400 | mV | 4 | |||
| Output Load Current | ILOAD | 3 | A | 4 | |||
| Short Frequency | FSHORT | 120 | KHz | VOUT = 0V | 4 | ||
| High Side MOSFET On-Resistance | RDS(ON)-HM | 125 | mΩ | 4 | |||
| Low Side MOSFET On-Resistance | RDS(ON)-LM | 100 | mΩ | 4 | |||
| High Side MOSFET Minimum On Time | TONMIN | 120 | ns | 4 | |||
| SST Pin Charge Current | ISST | 6.5 | uA | VSST = 0V | 4 | ||
| Thermal Shutdown Threshold | TOTP | 150 | °C | 4 | |||
| Thermal Shutdown Hysteresis | THYST | 20 | °C | 4 | |||
| Input Voltage | VPWR | -0.3 | 26 | V | 3 | ||
| RUN Pin Input Voltage | VRUN | -0.3 | 26 | V | 3 | ||
| BOOT Pin Voltage | VBOOT | -0.3 | 6.3 | V | relative to VSWITCH (VSWITCH-0.3V to VSWITCH+6.3V) | 3 | |
| SWITCH Pin Voltage | VSWITCH | -1 | 26 | V | 3 | ||
| FBK, SST Pins Voltage | VFBK, VCOMP, VSST | -0.3 | 6.3 | V | 3 | ||
| Ambient Temperature operating Range | TA | -40 | 85 | °C | 3 | ||
| Maximum Junction Temperature | TJmax | 150 | °C | 3 | |||
| Lead Temperature | 260 | °C | Soldering, 10 sec | 3 | |||
| Storage Temperature Range | TS | -65 | 150 | °C | 3 | ||
| Input Voltage | VPWR | 4.5 | 23 | V | 3 | ||
| RUN Pin Input Voltage | VRUN | -0.3 | 23 | V | 3 | ||
| Output Voltage | VOUT | 0.766 | 19 | V | 3 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 3 | ||
| Thermal Resistance SOP-8 (with EP) | θJC | 14 | °C/W | 3 | |||
| Thermal Resistance SOP-8 (with EP) | θJA | 65 | °C/W | 3 | |||
| Power Dissipation | PDmax | 1.92 | W | TA=25°C | 3 |
CAD (KiCad official)
- Symbol:
EA8253P8R - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
ea8253p8r-etched.step/ea8253p8r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ea8253p8r.step/ea8253p8r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Everanalog IC design datasheet (9 pp, sha256
61a724e760da3317, retrieved 2026-10-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).