component
EA8252O8R
Public Made by Adomby adom
Everanalog IC design DC-DC Converters, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
ea8252o8r: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
e3609c8
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{
"schema_version": 1,
"type": "component",
"slug": "ea8252o8r",
"title": "EA8252O8R",
"brief": "Everanalog IC design DC-DC Converters, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"pmic",
"ea8252o8r"
],
"component": {
"mpn": "EA8252O8R",
"manufacturer": "Everanalog IC design",
"package": "SOP-8",
"pin_count": 8,
"category": "PMIC",
"subcategory": "DC-DC Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/11f7ab82d21c04b06be41b970aed911c.pdf",
"parts": {
"symbol": "ea8252o8r.kicad_sym",
"footprint": "ea8252o8r.kicad_mod",
"model_3d": "ea8252o8r-etched.glb",
"model_3d_plain": "ea8252o8r.glb",
"model_3d_step": "ea8252o8r-etched.step",
"model_3d_step_plain": "ea8252o8r.step",
"lbr": "ea8252o8r.lbr"
},
"distributor_links": {
"lcsc": "C22462487"
},
"pins": [
{
"number": "1",
"name": "BOOT",
"type": "power_in",
"description": "Power input for the internal high-side N-MOSFET gate driver. Connect a 33nF ceramic capacitor from BOOT to SWITCH. Absolute range VSWITCH-0.3V to VSWITCH+6.3V."
},
{
"number": "2",
"name": "PWR",
"type": "power_in",
"description": "Main power input to the EA8252 (4.5V to 18V, abs max +20V). Bypass with two 10uF MLCCs to GND; if using electrolytics, add a 0.1uF ceramic close to the pin to suppress noise."
},
{
"number": "3",
"name": "SWITCH",
"type": "output",
"description": "Internal MOSFET switching node output. Connect to an external L-C low-pass filter to produce the regulated DC output voltage. Absolute rating -1V to +20V."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the controller and low-side MOSFET return."
},
{
"number": "5",
"name": "FBK",
"type": "input",
"description": "Feedback input to the internal error amplifier. Connect a resistor divider from VOUT to FBK to GND to set the output voltage; internal reference VREF = 0.765V (typ). Abs max -0.3V to +6.3V."
},
{
"number": "6",
"name": "NC",
"type": "unconnected",
"description": "No connect. Leave floating or tie to ground; not internally bonded to any function."
},
{
"number": "7",
"name": "RUN",
"type": "input",
"description": "Enable / on-off control input. VIL <= 0.4V (off), VIH >= 2V (on). Internal 950kΩ pull-down to GND. For automatic startup, tie to PWR through a 150kΩ pull-up. Abs max -0.3V to +20V."
},
{
"number": "8",
"name": "SST",
"type": "passive",
"description": "Soft-start programming pin. Connect a ceramic capacitor from SST to GND; the pin sources 5.5uA (typ) to set the soft-start ramp time. Abs max -0.3V to +6.3V."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/11f7ab82d21c04b06be41b970aed911c.pdf",
"pages": 7,
"sha256": "58069a748d5b4547",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "ea8252o8r.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ea8252o8r-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "e396dbf7bf808f045b1ef0ce043e464fefe705d9ff536a1bbb686e75acb0c2b9",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Everanalog IC design",
"Package": "SOP-8",
"Category": "PMIC",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ea8252o8r"
],
"discovery_pitch": "EA8252O8R (Everanalog IC design) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ea8252o8r.kicad_sym",
"ea8252o8r.kicad_mod",
"ea8252o8r.glb",
"ea8252o8r.step",
"ea8252o8r-etched.step",
"ea8252o8r.lbr",
"docs/hero.png",
"docs/ea8252o8r-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "EA8252O8R",
"kind": "packaging"
},
{
"mpn": "EA8252O8RP8R",
"kind": "packaging"
}
],
"updated_at": "2026-09-24T20:14:50.661Z"
}