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docs ea8212t6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
ea8212t6r-etched.fit.json ea8212t6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ea8212t6r-etched.glb ea8212t6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ea8212t6r-etched.step ea8212t6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ea8212t6r.glb Publish 0.1.0 · Ray
ea8212t6r.kicad_mod Publish 0.1.0 · Ray
ea8212t6r.kicad_sym Publish 0.1.0 · Ray
ea8212t6r.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ea8212t6r.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ea8212t6r: specified limits as data (metadata.characteristics, 35 rows from the datasheet) · Ray
README.md ea8212t6r: specified limits as data (metadata.characteristics, 35 rows from the datasheet) · Ray

EA8212T6R

Everanalog IC design · DC-DC Converters · SOT-23-6

EA8212T6R from Everanalog IC design, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT passive Bootstrap supply pin for the internal high-side N-MOSFET gate driver. Connect a 33nF ceramic capacitor between BOOT and SWITCH to provide the gate-drive voltage above VSWITCH. Absolute max: VSWITCH-0.3V to VSWITCH+6.3V.
2 GND power_in Device ground reference. Return path for both the input capacitors and the internal low-side MOSFET; must be tied to the PCB ground plane with a low-impedance connection.
3 FBK input Feedback input to the internal error amplifier, regulated to VREF = 0.6V (typ). Connect a resistor divider from VOUT to FBK to GND to program the output voltage: VOUT = 0.6V x (1 + R1/R2). Absolute max: -0.3V to +6.3V.
4 RUN input Enable/shutdown control input. Drive above VRUN-H = 2V to enable the converter, below VRUN-L = 0.4V to place the device in shutdown (ISD < 1uA). Can be tied to PWR through a 150KOhm pull-up for automatic startup. Absolute max: -0.3V to +21V.
5 PWR power_in Main power input, 4.5V to 18V (absolute max 21V). Supplies the internal high-side MOSFET and internal regulator. Recommended to decouple with two 10uF X5R/X7R MLCC capacitors to GND placed close to the pin.
6 SWITCH output Switching node between the internal high-side and low-side MOSFETs. Connects to the external inductor and bootstrap capacitor to form the buck LC filter output. Absolute max: -1V to +23V; delivers up to 2A continuous.

Key specifications

Parameter Value
Manufacturer Everanalog IC design
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • EA8212T6R

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VPWR 4.5 V 4
Shutdown Supply Current ISD 0.1 1 uA VRUN = 0V 4
Quiescent Current IQ 400 uA VRUN = 2V, VFBK = 105% VREF, ILOAD = 0A 4
Output Load Current ILOAD 2 A 4
Reference Voltage VREF 0.588 0.6 0.612 V 4.5V ≤ VPWR ≤ 21V 4
Switching Frequency FSW 400 500 600 KHz 4
Short Frequency FSHORT 100 KHz VOUT = 0V 4
High Side MOSFET On-Resistance RDS(ON)-HM 90 mΩ 4
Low Side MOSFET On-Resistance RDS(ON)-LM 70 mΩ 4
High Side MOSFET Current Limit ILIM-HM 3 4 A 4
High Side MOSFET Leakage Current ILEAK-HM 1 10 uA VRUN = 0V, VSWITCH = 0V 4
RUN Pin Input Low Voltage VRUN-L 0.4 V 4
RUN Pin Input High Voltage VRUN-H 2 V 4
Maximum Duty Cycle DMAX 92 % VFBK = 0.5V 4
UVLO Threshold VUVLO 2.8 V VPWR Rising 4
UVLO Hysteresis VUV-HYST 300 mV 4
High Side MOSFET Minimum On Time TONMIN 60 ns 4
Thermal Shutdown Threshold TOTP 160 °C 4
Thermal Shutdown Hysteresis THYST 30 °C 4
Input Voltage (VPWR) VPWR 4.5 18 V 3
RUN Pin Input Voltage VRUN -0.3 18 V 3
Output Voltage (VOUT) VOUT 0.6 12 V 3
Junction Temperature Range TJ -40 125 °C 3
Input Voltage (VPWR) VPWR -0.3 21 V 3
RUN Pin Input Voltage VRUN -0.3 21 V 3
BOOT Pin Voltage VBOOT -0.3 6.3 V Relative to SWITCH pin: VSWITCH-0.3V to VSWITCH+6.3V 3
SWITCH Pin Voltage VSWITCH -1 23 V 3
FBK Pin Voltage VFBK -0.3 6.3 V 3
Ambient Temperature Operating Range TA -40 85 °C 3
Maximum Junction Temperature TJmax 150 °C 3
Lead Temperature (Soldering) 260 °C Soldering, 10 sec 3
Storage Temperature Range TS -65 150 °C 3
SOT-23-6 Power Dissipation PDmax 0.5 W TA=25°C 3
SOT-23-6 Thermal Resistance (junction-to-case) θJC 125 °C/W 3
SOT-23-6 Thermal Resistance (junction-to-ambient) θJA 250 °C/W 3

CAD (KiCad official)

  • Symbol: EA8212T6R
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: ea8212t6r-etched.step / ea8212t6r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ea8212t6r.step / ea8212t6r.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ea8212t6r.step 97 KB You want the bare part, or you mark your own boards.
ea8212t6r-etched.step 1.8 MB You want the part with EA8212T6R already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 453 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Everanalog IC design datasheet (10 pp, sha256 087ea1ebff6656b1, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF