component

EA8212HT6R

Public Made by Adom

by adom

Everanalog IC design DC-DC Converters, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ea8212ht6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
ea8212ht6r-etched.fit.json ea8212ht6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ea8212ht6r-etched.glb ea8212ht6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ea8212ht6r-etched.step ea8212ht6r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ea8212ht6r.glb Publish 0.1.0 · Ray
ea8212ht6r.kicad_mod Publish 0.1.0 · Ray
ea8212ht6r.kicad_sym Publish 0.1.0 · Ray
ea8212ht6r.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ea8212ht6r.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ea8212ht6r: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ea8212ht6r: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

EA8212HT6R

Everanalog IC design · DC-DC Converters · SOT-23-6

EA8212HT6R from Everanalog IC design, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT power_in Bootstrap supply for the internal high-side N-MOSFET gate driver. Connect a 33nF ceramic capacitor from BOOT to SWITCH to develop the boosted gate-drive rail (VSWITCH-0.3V to VSWITCH+5.0V absolute max).
2 GND power_in Device ground reference and return for the low-side power MOSFET. Tie to the system power ground plane.
3 FBK input Feedback input to the internal error amplifier (VREF = 0.6V typ). Set output voltage with an external resistor divider between VOUT, FBK and GND: VOUT = 0.6 * (1 + R1/R2). Absolute maximum -0.3V to +6.3V.
4 RUN input Enable / on-off control input. Drive above 1.8V (VRUN-H) to enable the converter, below 0.4V (VRUN-L) for shutdown (ISD ~1uA). Can be tied to PWR through a 100k pull-up for automatic startup. Absolute max -0.3V to +20V.
5 PWR power_in Main power input (4.5V to 18V operating, 20V absolute max). Decouple with two 10uF X5R/X7R MLCC capacitors placed as close as possible to the pin.
6 SWITCH output Switching node between the internal high-side and low-side power MOSFETs. Connect to an external inductor (typ. 3.3uH-6.8uH) and output capacitor forming the LC filter that produces the regulated DC output. Also serves as the return for the BOOT bootstrap capacitor. Absolute max -1V to +20V.

Key specifications

Parameter Value
Manufacturer Everanalog IC design
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • EA8212HT6R

CAD (KiCad official)

  • Symbol: EA8212HT6R
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: ea8212ht6r-etched.step / ea8212ht6r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ea8212ht6r.step / ea8212ht6r.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ea8212ht6r.step 97 KB You want the bare part, or you mark your own boards.
ea8212ht6r-etched.step 1.9 MB You want the part with EA8212HT6R already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 480 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Everanalog IC design datasheet (10 pp, sha256 91a56ea8f39197cd, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF