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Ray ea2224: laser-etched CAD + chip hero (factory 2.0.0 backfill) 8f3ebf3

EA2224

Everanalog IC design · DC-DC Converters · TDFN-14-EP(3x4)

EA2224 from Everanalog IC design, in a TDFN-14-EP(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VINA power_in IC analog power supply input, 2.7V to 5.5V operating range. Powers the internal control/logic; typically tied to VIN through a small RC filter.
2 GND power_in Chip analog ground reference for the control circuitry.
3 FB input Voltage feedback input. For adjustable versions, connect to an external divider (VFB = 500mV typical); for fixed 3.3V versions, tie directly to VOUT.
4 VOUT power_out Power output of the Buck-Boost converter, 2.8V to 5.5V (or fixed 3.3V). Pins 4 and 5 must be tied together and bypassed with output capacitors.
5 VOUT power_out Power output of the Buck-Boost converter (paralleled with pin 4 for current handling).
6 LXU passive Inductor switch node on the up-converter (boost) side. Pins 6 and 7 must be tied together and connected to one terminal of the external inductor. RON typ 50mΩ.
7 LXU passive Inductor switch node on the up-converter (boost) side (paralleled with pin 6).
8 LXD passive Inductor switch node on the down-converter (buck) side. Pins 8 and 9 must be tied together and connected to the other terminal of the external inductor. RON typ 50mΩ.
9 LXD passive Inductor switch node on the down-converter (buck) side (paralleled with pin 8).
10 VIN power_in Power input of the Buck-Boost converter, 2.7V to 5.5V. Pins 10 and 11 must be tied together and bypassed with input capacitors.
11 VIN power_in Power input of the Buck-Boost converter (paralleled with pin 10 for current handling).
12 EN input Enable input (1 = enabled, 0 = disabled). VIH >= 1.2V, VIL <= 0.4V. Must not be left open.
13 PS/SYNC input Dual-function control: Power-Save mode select (1 = disabled/FPWM, 0 = enabled) OR external clock input for synchronization (4.4-5.2MHz range). Must not be left open.
14 PWRGD output Power Good indicator, open-drain output (1 = good, 0 = failure). Asserts when VOUT >= ~95% of VOUT,SET; requires external pull-up.
15 PGND power_in Power ground of the Buck-Boost converter (exposed thermal pad). Must be soldered to a large PCB copper area connected to PGND for maximum power/thermal dissipation.

Key specifications

Parameter Value
Manufacturer Everanalog IC design
Package TDFN-14-EP(3x4)
Category PMIC
Pins 15

Ordering variants

Same part, different packaging or reel option.

  • EA2224K

CAD (KiCad official)

  • Symbol: EA2224
  • Footprint: Package_DFN_QFN:DFN-14-1EP_3x4mm_P0.5mm_EP1.7x3.3mm
  • 3D model: TDFN-14-EP(3x4) (KiCad packages3D, STEP)
  • 3D model files: ea2224-etched.step / ea2224-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ea2224.step / ea2224.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Everanalog IC design datasheet (12 pp, sha256 46f42b31d1738b26, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF