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DX5012D

Public Made by Adom

by adom

Dersem AC-DC Controllers And Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DX5012D

Dersem · AC-DC Controllers And Regulators · SOP-8

DX5012D from Dersem, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Chip supply pin that also serves as the output-voltage feedback point when FB is left floating; a 1µF ceramic capacitor is recommended, VDD_ON is 7.5V typical, VDD_OFF is 7.0V, VDD_OVP is 28V typical, the internal clamp is 30V at 10mA, and absolute supply maximum is 30V.
2 GND power_in Reference ground for the chip.
3 FB input Feedback input; when left floating the device defaults to a 12V output, the internal reference VFB_REF is 2.0V (1.97-2.03V), the OVP detection threshold is 2.4V and the OLP detection threshold is 1.87V, with FB and CS pin voltage limited to -0.3 to 7V.
4 CS output Peak-current sense pin whose voltage is compared with the 0.50-0.60V (0.55V typical) peak current threshold, with an abnormal over-current threshold of 0.9V and an absolute pin voltage range of -0.3 to 7V.
5 Drain power_in Drain of the internal 500V high-voltage power MOSFET and high-voltage start-up input, with an absolute drain pin voltage range of -0.3 to 500V.
6 Drain power_in Drain of the internal 500V high-voltage power MOSFET and high-voltage start-up input, with an absolute drain pin voltage range of -0.3 to 500V.
7 Drain power_in Drain of the internal 500V high-voltage power MOSFET and high-voltage start-up input, with an absolute drain pin voltage range of -0.3 to 500V.
8 Drain power_in Drain of the internal 500V high-voltage power MOSFET and high-voltage start-up input, with an absolute drain pin voltage range of -0.3 to 500V.

Key specifications

Parameter Value
Manufacturer Dersem
Package SOP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain pin voltage -0.3 500 V 4
VDD supply voltage VDD 30 V 4
VDD clamp current 10 mA 4
FB, CS pin voltage -0.3 7 V 4
Maximum junction operating temperature 160 ℃ 4
Storage temperature -65 150 ℃ 4
Pin temperature (soldering, 10 s) 260 ℃ 10 s soldering 4
ESD capability (human body model) 3 kV Human body model 4
Operating ambient temperature -40 85 ℃ 4
Switching frequency 40 60 KHz 4
Internal differential amplifier input reference (FB) VFB_REF 1.97 2 2.03 V 5
Peak current threshold VIPK 0.5 0.55 0.6 V 5
Typical minimum off time TOFF_min_norm 14.5 16 17.5 µs 5
HV pin supply current IHV 1 2 mA Drain=500V, VDD=0V 4
VDD start-up current IVDD_st 100 300 µA No switching operation 4
HV pin leakage current IHV_leakage 10 µA Drain=500V, VDD=12V 4
VDD turn-on voltage VDD_ON 7.5 V 4
VDD undervoltage protection voltage VDD_OFF 7 V 4
VDD regulation voltage VDD_Reg1 12 V FB floating 4
VDD operating current IVDD_Op 800 µA Fsw=60kHz 4
VDD quiescent current IVDD_Q 200 µA 4
VDD overvoltage protection threshold VDD_OVP 28 V 4
VDD clamp voltage VDD_Clamp 30 V IVDD=10mA 4
Output overvoltage protection (OVP) detection threshold VFB_OVP 2.4 V 5
Output overload protection (OLP) detection threshold VFB_OLP 1.87 V 5
Overload protection delay time TD_OLP 50 ms 5
Leading edge blanking TLEB 350 ns 5
Overcurrent comparator delay TD_OCP 100 ns 5
Abnormal overcurrent protection detection threshold VAOCP 0.9 V 5
Typical maximum off time TOFF_max_nom 1.4 ms 5
Maximum off time in dynamic response mode TOFF_max_FDR 420 µs 5
Maximum on time TON_max 12 µs 5
Internal soft-start time Tss 3 ms 5
Auto-recovery delay time TAuto_Recovery 500 ms 5
Overtemperature protection threshold TSD 150 ℃ Note 2 (备注2): depends on actual design; functional test in mass production 5
Power MOSFET breakdown voltage VBR 500 V 5
Static on-resistance (Drain) Rdson 9 Ω 5
Thermal resistance, junction to ambient (SOP-8) 165 ℃/W 4

CAD (KiCad official)

  • Symbol: DX5012D
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: dx5012d-etched.step / dx5012d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dx5012d.step / dx5012d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Dersem datasheet (9 pp, sha256 99ef7d6e5c20ca55, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF