DX5011D

Dersem · AC-DC Controllers And Regulators · SOP-8

DX5011D from Dersem, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS	input	Peak current sense input: the power MOSFET turns off when the CS voltage reaches the peak-current threshold VIPK (0.50 to 0.60 V, 0.55 V typical), and an abnormal over-current threshold VAOCP of 0.9 V shuts the MOSFET off for 48 us.
2	VDD	power_in	Chip supply pin that also serves as the output-voltage feedback point when FB is left open; VDD turns on at 7.5 V, undervoltage cutoff is 7.0 V, overvoltage protection trips at 28 V, the internal clamp is 30 V at 10 mA, and a 1 uF ceramic capacitor is recommended.
3	GND	power_in	Chip ground reference pin.
4	FB	input	Feedback input with internal reference VFB_REF of 2.0 V (1.97 to 2.03 V); leaving it floating selects the default 12 V output, and the overvoltage, overload and undervoltage thresholds are 2.4 V, 1.87 V respectively, with FB/CS pin voltage rated -0.3 to 7 V.
5	Drain	power_in	Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V.
6	Drain	power_in	Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V.
7	Drain	power_in	Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V.
8	Drain	power_in	Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V.

Key specifications

Parameter	Value
Manufacturer	Dersem
Package	SOP-8
Category	Power Management (PMIC)
Pins	8

CAD (KiCad official)

Symbol: DX5011D
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: dx5011d-etched.step / dx5011d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dx5011d.step / dx5011d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Dersem datasheet (11 pp, sha256 3254133f836c5ed4, retrieved 2026-10-09, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# DX5011D

**Dersem** · AC-DC Controllers And Regulators · SOP-8

DX5011D from Dersem, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Peak current sense input: the power MOSFET turns off when the CS voltage reaches the peak-current threshold VIPK (0.50 to 0.60 V, 0.55 V typical), and an abnormal over-current threshold VAOCP of 0.9 V shuts the MOSFET off for 48 us. |
| 2 | VDD | power_in | Chip supply pin that also serves as the output-voltage feedback point when FB is left open; VDD turns on at 7.5 V, undervoltage cutoff is 7.0 V, overvoltage protection trips at 28 V, the internal clamp is 30 V at 10 mA, and a 1 uF ceramic capacitor is recommended. |
| 3 | GND | power_in | Chip ground reference pin. |
| 4 | FB | input | Feedback input with internal reference VFB_REF of 2.0 V (1.97 to 2.03 V); leaving it floating selects the default 12 V output, and the overvoltage, overload and undervoltage thresholds are 2.4 V, 1.87 V respectively, with FB/CS pin voltage rated -0.3 to 7 V. |
| 5 | Drain | power_in | Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V. |
| 6 | Drain | power_in | Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V. |
| 7 | Drain | power_in | Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V. |
| 8 | Drain | power_in | Drain of the internal high-voltage 500 V power MOSFET and high-voltage start-up circuit; the Drain pin voltage is rated -0.3 to 500 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Dersem |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `DX5011D`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `dx5011d-etched.step` / `dx5011d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dx5011d.step` / `dx5011d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Dersem datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603378640457916416) (11 pp, sha256 `3254133f836c5ed4`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dx5011d-datasheet.pdf)