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DW06

Public Made by Adom

by adom

JSMSEMI Battery Management, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs dw06: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers dw06: viewers · Ray
dw06-etched.fit.json dw06: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dw06-etched.glb dw06: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dw06-etched.step dw06: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
dw06.glb Publish 0.1.0 · Ray
dw06.kicad_mod Publish 0.1.0 · Ray
dw06.kicad_sym Publish 0.1.0 · Ray
dw06.lbr Publish 0.1.0 · Ray
dw06.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
page.json dw06: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md dw06: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

DW06

JSMSEMI · Battery Management · SOT-23-6

DW06 from JSMSEMI, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 V- input Current-sense input pin and charger-detection input. Monitors the voltage between BATT- and GND to detect overcurrent, short-circuit and charger-present conditions (VCHA ≈ -0.5 V; VOI1 ≈ 150 mV; VOI2 ≈ 1.0 V).
2 S1 passive Source of the internal charge-control MOSFET; connects to the charging negative terminal (pack B-/BATT- node through the sense resistor path).
3 S2 passive Source of the internal discharge-control MOSFET; tied externally to VSS (cell negative) per the typical application.
4 D passive Common drain node of the internal charge and discharge MOSFETs (back-to-back FET common-drain connection). Left as an internal-only pin in typical applications.
5 VDD power_in Positive supply input, connects to the Li-ion cell positive terminal through a series resistor (typ. 100 Ω) with a decoupling cap (typ. 0.1 uF) to VSS. Operating range 1.5 V to 10 V; absolute max VSS+12 V.
6 VSS power_in Ground / negative supply; connects to the Li-ion cell negative terminal and is the reference for all internal detection thresholds.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • DW06

CAD (KiCad official)

  • Symbol: DW06
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: dw06-etched.step / dw06-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dw06.step / dw06.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
dw06.step 97 KB You want the bare part, or you mark your own boards.
dw06-etched.step 1.1 MB You want the part with DW06 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 272 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (6 pp, sha256 a29083e9e9ce0d9b, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF