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DTS6504-VB

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by adom

VBsemi Elec MOSFETs, SC-70-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs dts6504-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers dts6504-vb: viewers · Ray 1mo ago
dts6504-vb-etched.fit.json dts6504-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
dts6504-vb-etched.glb dts6504-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
dts6504-vb-etched.step dts6504-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
dts6504-vb.glb Publish 0.1.0 · Ray 1mo ago
dts6504-vb.kicad_mod Publish 0.1.0 · Ray 1mo ago
dts6504-vb.kicad_sym Publish 0.1.0 · Ray 1mo ago
dts6504-vb.lbr Publish 0.1.0 · Ray 1mo ago
dts6504-vb.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json dts6504-vb: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md dts6504-vb: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

DTS6504-VB

VBsemi Elec · MOSFETs · SC-70-6

DTS6504-VB from VBsemi Elec, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain. Internally connected to pins 1, 2, 5, and 6 (multiple drain leads for reduced RDS(on) and improved thermal dissipation). VDS rated 30 V, continuous ID = 4.5 A (TC = 25 °C).
2 D passive Drain (internally common with pins 1, 5, 6). VDS = 30 V max, continuous ID = 4.5 A at TC = 25 °C.
3 G input Gate. VGS rated ±20 V max, gate-source threshold VGS(th) 0.5 V min / 2.5 V max at VDS = VGS, ID = 250 µA. Total gate charge Qg = 4.2 nC typ. at VGS = 4.5 V.
4 S passive Source. Reference for VGS control voltage; carries continuous source current up to IS = 2.1 A (TC = 25 °C). Body diode anode (VSD typ. 0.82 V at IS = 4.4 A).
5 D passive Drain (internally common with pins 1, 2, 6). VDS = 30 V max.
6 D passive Drain (internally common with pins 1, 2, 5). VDS = 30 V max.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SC-70-6
Category Transistors/Thyristors
Pins 6

CAD (KiCad official)

  • Symbol: DTS6504-VB
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SC-70-6 (KiCad packages3D, STEP)
  • 3D model files: dts6504-vb-etched.step / dts6504-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dts6504-vb.step / dts6504-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (None pp, sha256 1fec36264af468b9, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF