component

DTC114ECA

Public Made by Adom

by adom

Changjing Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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dtc114eca-hero.glb dtc114eca: hero GLB from the etched model (keeps the MPN mark) · Ray 20d ago
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DTC114ECA

Changjing · Digital Transistors · SOT-23

DTC114ECA from Changjing, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input pin of the built-in bias-resistor inverter stage; the datasheet's maximum input voltage rating is -10 V to +40 V.
2 GND power_in Ground reference pin for the device.
3 OUT output Open-collector NPN output; the datasheet rates the supply voltage VCC at 50 V maximum and the output current IO at 50 mA maximum.

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: DTC114ECA
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: dtc114eca-etched.step / dtc114eca-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dtc114eca.step / dtc114eca.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (15 pp, sha256 1c0974c77176c6f2, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF