component
DTA114ESA
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Changjing Digital Transistors, TO-92S. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DTA114ESA
Changjing · Digital Transistors · TO-92S
DTA114ESA from Changjing, in a TO-92S. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin of the TO-92S variant (DTA114ESA), the common reference for the built-in bias-resistor inverter. |
| 2 | OUT | output | Output pin; the datasheet limits output current to -50 mA (IO), with VO(on) of -0.3 V max at IO/II = -10 mA/-0.5 mA and IO(off) of -0.5 µA max at VCC = -50 V. |
| 3 | IN | input | Input pin with a built-in input resistor R1 of 7 to 13 kΩ (typ. 10 kΩ); VI(off) is -0.5 V max and VI(on) is -3 V max, and VIN is rated -40 V to +10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | TO-92S |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -50 | V | 2 | |||
| Input Voltage | VIN | -40 | 10 | V | 2 | ||
| Output Current | IO | -50 | mA | 2 | |||
| Peak Collector Current | ICM | -100 | mA | 2 | |||
| Power Dissipation (SA column) | PD | 300 | mW | 2 | |||
| Operation Junction and Storage Temperature Range | TJ,Tstg | -55 | 150 | ℃ | 2 | ||
| Input voltage (off) | VI(off) | -0.5 | V | VCC=-5V,IO=-100µA | 2 | ||
| Input voltage (on) | VI(on) | -3 | V | VO=-0.3V,IO=-10 mA | 2 | ||
| Output voltage (on) | VO(on) | -0.3 | V | IO/II=-10mA/-0.5mA | 2 | ||
| Input current | II | -0.88 | mA | VI=-5V | 2 | ||
| Output current (off) | IO(off) | -0.5 | μA | VCC=-50V,VI=0 | 2 | ||
| DC current gain | GI | 30 | VO=-5V,IO=-5mA | 2 | |||
| Input resistance | R1 | 7 | 10 | 13 | kΩ | 2 | |
| Resistance ratio | R2/R1 | 0.8 | 1 | 1.2 | 2 |
CAD (KiCad official)
- Symbol:
DTA114ESA - Footprint:
Package_TO_SOT_THT:TO-92_Inline - 3D model: TO-92S (KiCad packages3D, STEP)
- 3D model files:
dta114esa-etched.step/dta114esa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dta114esa.step/dta114esa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Changjing datasheet (15 pp, sha256
9d7bd4c8317921df, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DTA114ESA
**Changjing** · Digital Transistors · TO-92S
DTA114ESA from Changjing, in a TO-92S. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin of the TO-92S variant (DTA114ESA), the common reference for the built-in bias-resistor inverter. |
| 2 | OUT | output | Output pin; the datasheet limits output current to -50 mA (IO), with VO(on) of -0.3 V max at IO/II = -10 mA/-0.5 mA and IO(off) of -0.5 µA max at VCC = -50 V. |
| 3 | IN | input | Input pin with a built-in input resistor R1 of 7 to 13 kΩ (typ. 10 kΩ); VI(off) is -0.5 V max and VI(on) is -3 V max, and VIN is rated -40 V to +10 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | TO-92S |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | | | -50 | V | | 2 |
| Input Voltage | VIN | -40 | | 10 | V | | 2 |
| Output Current | IO | | | -50 | mA | | 2 |
| Peak Collector Current | ICM | | | -100 | mA | | 2 |
| Power Dissipation (SA column) | PD | | | 300 | mW | | 2 |
| Operation Junction and Storage Temperature Range | TJ,Tstg | -55 | | 150 | ℃ | | 2 |
| Input voltage (off) | VI(off) | | | -0.5 | V | VCC=-5V,IO=-100µA | 2 |
| Input voltage (on) | VI(on) | | | -3 | V | VO=-0.3V,IO=-10 mA | 2 |
| Output voltage (on) | VO(on) | | | -0.3 | V | IO/II=-10mA/-0.5mA | 2 |
| Input current | II | | | -0.88 | mA | VI=-5V | 2 |
| Output current (off) | IO(off) | | | -0.5 | μA | VCC=-50V,VI=0 | 2 |
| DC current gain | GI | 30 | | | | VO=-5V,IO=-5mA | 2 |
| Input resistance | R1 | 7 | 10 | 13 | kΩ | | 2 |
| Resistance ratio | R2/R1 | 0.8 | 1 | 1.2 | | | 2 |
## CAD (KiCad official)
- Symbol: `DTA114ESA`
- Footprint: `Package_TO_SOT_THT:TO-92_Inline`
- 3D model: TO-92S (KiCad packages3D, STEP)
- 3D model files: `dta114esa-etched.step` / `dta114esa-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dta114esa.step` / `dta114esa.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Changjing datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590917921231761408) (15 pp, sha256 `9d7bd4c8317921df`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dta114esa-datasheet.pdf)