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Contents

README

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DT1042-02SR-7

Diodes Incorporated · ESD And Surge Protection (TVS/ESD) · SOT-143

DT1042-02SR-7 from Diodes Incorporated, in a SOT-143. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground (VSS) reference pin; the I/O clamp diodes and VCC-to-VSS TVS return to it, with ESD rated to ±16kV contact and ±18kV air per IEC 61000-4-2.
2 I/O1 passive Protected channel 1 I/O line clamped to VSS, with typical 0.65pF capacitance (0.8pF max), 0.5µA max leakage at 5V and ±6A peak pulse current (8/20µs).
3 I/O2 passive Protected channel 2 I/O line clamped to VSS, with typical 0.65pF capacitance (0.8pF max), 0.5µA max leakage at 5V and ±6A peak pulse current (8/20µs).
4 VCC power_in Positive reference rail for the steering diodes, with 5.0V max reverse working voltage and 6.2V min breakdown voltage at 1mA to VSS.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-143
Category Circuit Protection
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Peak Pulse Current, Per IEC61000-4-5 IPP_I/O -6 6 A I/O to VSS, 8/20μs 2
Peak Pulse Power, Per IEC61000-4-5 PPP_I/O 55 W I/O to VSS, 8/20μs 2
Operating Voltage (DC) VDC 5.5 V I/O to VSS 2
ESD Protection, Contact Discharge, Per IEC61000-4-2 VESD_I/O -16 16 kV I/O to VSS 2
ESD Protection, Air Discharge, Per IEC61000-4-2 VESD_I/O -18 18 kV I/O to VSS 2
Operating and Storage Temperature Range TJ, TSTG -55 150 C 2
Reverse Working Voltage VRWM 5 V VCC to VSS 2
Reverse Current (VCC to VSS) IR (VCC to VSS) 1 µA VR = VRWM = 5V, VCC to VSS 2
Reverse Current (I/O to VSS) IR (I/O to VSS) 0.5 µA VR = VRWM = 5V, Any I/O to VSS 2
Reverse Breakdown Voltage VBR 6.2 V IR = 1mA, VCC to VSS 2
Forward Clamping Voltage VF -1 -0.8 V IF = -15mA, VCC to VSS 2
Reverse Clamping Voltage (I/O) VC_I/O 7.7 9 V IPP = 6A, I/O to VSS, 8/20μs 2
Channel Input Capacitance CI/O to Vss 0.65 0.8 pF VR = 2.5V, VCC = 5V, f = 1MHz 2
Power Dissipation Typical PD 350 mW Typical (Note 5) 2
Thermal Resistance, Junction to Ambient Typical RϴJA 360 °C/W Typical (Note 5) 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Matte Tin Finish Annealed over Alloy 42 Leadframe (Lead-free Plating). Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DT1042-02SR-7
  • Footprint: Package_TO_SOT_SMD:SOT-143
  • 3D model: SOT-143 (KiCad packages3D, STEP)
  • 3D model files: dt1042-02sr-7-etched.step / dt1042-02sr-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dt1042-02sr-7.step / dt1042-02sr-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (5 pp, sha256 6c02d6aec33bdcf4, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF