component
DSS5240T-7
Public Made by Adomby adom
Diodes Incorporated Bipolar Transistors - BJT, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDSS5240T-7
Diodes Incorporated · Bipolar Transistors - BJT · SOT-23
DSS5240T-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Base of the PNP transistor; the datasheet rates base current at -300mA and emitter-base voltage at -5V. |
| 2 | E | passive | Emitter of the PNP transistor; VEBO is limited to -5V. |
| 3 | C | passive | Collector of the PNP transistor; VCEO is -40V, continuous IC is -2A and peak ICM is -3A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-Base Voltage | VCBO | -40 | V | TA = +25°C | 2 | ||
| Collector-Emitter Voltage | VCEO | -40 | V | TA = +25°C | 2 | ||
| Emitter-Base Voltage | VEBO | -5 | V | TA = +25°C | 2 | ||
| Peak Pulse Collector Current | ICM | -3 | A | TA = +25°C | 2 | ||
| Continuous Collector Current | IC | -2 | A | TA = +25°C | 2 | ||
| Base Current | IB | -300 | mA | TA = +25°C | 2 | ||
| Power Dissipation (Note 6) | PD | 730 | mW | Collector lead on 15mm × 15mm 1oz copper, TA = +25°C | 2 | ||
| Power Dissipation (Note 7) | PD | 600 | mW | Minimum recommended pad layout, TA = +25°C | 2 | ||
| Thermal Resistance, Junction to Ambient Air (Note 6) | RϴJA | 171 | °C/W | 15mm × 15mm 1oz copper | 2 | ||
| Thermal Resistance, Junction to Ambient Air (Note 7) | RϴJA | 209 | °C/W | Minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Lead (Note 8) | RϴJL | 75 | °C/W | 2 | |||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| ESD Human Body Model | ESD HBM | 4000 | V | JEDEC Class 3A | 2 | ||
| ESD Machine Model | ESD MM | 400 | V | JEDEC Class C | 2 | ||
| Collector-Base Breakdown Voltage | BVCBO | -40 | V | IC = -100µA | 4 | ||
| Collector-Emitter Breakdown Voltage | BVCEO | -40 | V | IC = -10mA | 4 | ||
| Emitter-Base Breakdown Voltage | BVEBO | -5 | V | IE = -100µA | 4 | ||
| Collector-Base Cutoff Current | ICBO | -100 | nA | VCB = -30V, IE = 0 | 4 | ||
| Collector-Base Cutoff Current | ICBO | -50 | µA | VCB = -30V, IE = 0, TA = +150°C | 4 | ||
| Emitter-Base Cutoff Current | IEBO | -100 | nA | VEB = -4V, IC = 0 | 4 | ||
| DC Current Gain | hFE | 300 | VCE = -2V, IC = -0.1A | 4 | |||
| DC Current Gain | hFE | 260 | VCE = -2V, IC = -0.5A | 4 | |||
| DC Current Gain | hFE | 210 | VCE = -2V, IC = -1A | 4 | |||
| DC Current Gain | hFE | 100 | VCE = -2V, IC = -2A | 4 | |||
| Collector-Emitter Saturation Voltage | VCE(SAT) | -100 | mV | IC = -100mA, IB = -1mA | 4 | ||
| Collector-Emitter Saturation Voltage | VCE(SAT) | -45 | -110 | mV | IC = -500mA, IB = -50mA | 4 | |
| Collector-Emitter Saturation Voltage | VCE(SAT) | -225 | mV | IC = -750mA, IB = -15mA | 4 | ||
| Collector-Emitter Saturation Voltage | VCE(SAT) | -350 | mV | IC = -2A, IB = -200mA | 4 | ||
| Equivalent On-Resistance | RCE(SAT) | 90 | 220 | mΩ | IC = -500mA, IB = -50mA | 4 | |
| Base-Emitter Saturation Voltage | VBE(SAT) | -1.1 | V | IC = -2A, IB = -200mA | 4 | ||
| Base-Emitter Turn-on Voltage | VBE(ON) | -0.75 | V | VCE = -2V, IC = -100mA | 4 | ||
| Transition Frequency | fT | 100 | MHz | VCE = -10V, IC = -100mA, f = 100MHz | 4 | ||
| Output Capacitance | Cobo | 28 | pF | VCB = -10V, f = 1MHz | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | • Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DSS5240T-7 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
dss5240t-7-etched.step/dss5240t-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dss5240t-7.step/dss5240t-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
a0aa5ad7cc3be87b, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).