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DSS4160V-7

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Diodes Incorporated Bipolar Transistors - BJT, SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DSS4160V-7

Diodes Incorporated · Bipolar Transistors - BJT · SOT-563

DSS4160V-7 from Diodes Incorporated, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C passive Collector, tied together with pins 2, 5 and 6; VCEO 60 V, IC 1 A continuous (2 A peak).
2 C passive Collector, tied together with pins 1, 5 and 6; VCBO 80 V, IC 1 A continuous.
3 B input Base of the NPN transistor; IB 300 mA DC (1 A peak), VEBO 5 V.
4 E passive Emitter of the NPN transistor; emitter-base voltage limited to 5 V.
5 C passive Collector, tied together with pins 1, 2 and 6; VCEO 60 V, IC 1 A continuous.
6 C passive Collector, tied together with pins 1, 2 and 5; VCBO 80 V, IC 1 A continuous.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-563
Category Transistors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Base Voltage VCBO 80 V TA = 25°C 1
Collector-Emitter Voltage VCEO 60 V TA = 25°C 1
Emitter-Base Voltage VEBO 5 V TA = 25°C 1
Collector Current - Continuous IC 1 A TA = 25°C 1
Peak Pulse Collector Current ICM 2 A TA = 25°C 1
Base Current (DC) IB 300 mA TA = 25°C 1
Peak Base Current IBM 1 A TA = 25°C 1
Power Dissipation PD 600 mW TA = 25°C, Note 3 1
Thermal Resistance, Junction to Ambient RθJA 208 °C/W TA = 25°C, Note 3 1
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 1
Collector-Base Breakdown Voltage V(BR)CBO 80 V IC = 100μA, IE = 0 2
Collector-Emitter Breakdown Voltage V(BR)CEO 60 V IC = 10mA, IB = 0 2
Emitter-Base Breakdown Voltage V(BR)EBO 5 V IE = 100μA, IC = 0 2
Collector Cutoff Current ICBO 100 nA VCB = 60V, IE = 0 2
Collector Cutoff Current ICBO 50 μA VCB = 60V, IE = 0, TA = 150°C 2
Emitter Cutoff Current IEBO 100 nA VEB = 5V, IC = 0 2
DC Current Gain hFE 250 VCE = 5V, IC = 1mA 2
DC Current Gain hFE 200 VCE = 5V, IC = 500mA 2
DC Current Gain hFE 100 VCE = 5V, IC = 1A 2
Collector-Emitter Saturation Voltage VCE(SAT) 110 mV IC = 100mA, IB = 1mA 2
Collector-Emitter Saturation Voltage VCE(SAT) 140 mV IC = 500mA, IB = 50mA 2
Collector-Emitter Saturation Voltage VCE(SAT) 250 mV IC = 1A, IB = 100mA 2
Collector-Emitter Saturation Resistance RCE(SAT) 250 mΩ IC = 1A, IB = 100mA 2
Base-Emitter Saturation Voltage VBE(SAT) 1.1 V IC = 1A, IB = 50mA 2
Base-Emitter Turn On Voltage VBE(ON) 0.9 V VCE = 5V, IC = 1A 2
Output Capacitance Cobo 10 pF VCB = 10V, f = 1.0MHz 2
Current Gain-Bandwidth Product fT 150 MHz VCE = 10V, IC = 50mA, f = 100MHz 2
Turn-On Time ton 68 ns VCC = 10V, IC = 0.5A, IB1 = IB2 = 25mA 2
Delay Time td 31 ns VCC = 10V, IC = 0.5A, IB1 = IB2 = 25mA 2
Rise Time tr 37 ns VCC = 10V, IC = 0.5A, IB1 = IB2 = 25mA 2
Turn-Off Time toff 430 ns VCC = 10V, IC = 0.5A, IB1 = IB2 = 25mA 2
Storage Time ts 383 ns VCC = 10V, IC = 0.5A, IB1 = IB2 = 25mA 2
Fall Time tf 47 ns VCC = 10V, IC = 0.5A, IB1 = IB2 = 25mA 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin • Terminals: Finish ⎯ Matte Tin annealed over Copper leadframe. 1

CAD (KiCad official)

  • Symbol: DSS4160V-7
  • Footprint: Package_TO_SOT_SMD:SOT-563
  • 3D model: SOT-563 (KiCad packages3D, STEP)
  • 3D model files: dss4160v-7-etched.step / dss4160v-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dss4160v-7.step / dss4160v-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (5 pp, sha256 45dc6ef5e7b75a1d, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF